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修訂099bf53b7a4bf69f4c4007c769895263a9c3f6f4 (tree)
時間2018-12-13 23:41:24
作者Richard Henderson <richard.henderson@lina...>
CommiterPeter Maydell

Log Message

target/arm: Add HCR_EL2 bits up to ARMv8.5

Post v8.3 bits taken from SysReg_v85_xml-00bet8.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181203203839.757-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Change Summary

差異

--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1249,7 +1249,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
12491249 #define HCR_TIDCP (1ULL << 20)
12501250 #define HCR_TACR (1ULL << 21)
12511251 #define HCR_TSW (1ULL << 22)
1252-#define HCR_TPC (1ULL << 23)
1252+#define HCR_TPCP (1ULL << 23)
12531253 #define HCR_TPU (1ULL << 24)
12541254 #define HCR_TTLB (1ULL << 25)
12551255 #define HCR_TVM (1ULL << 26)
@@ -1261,6 +1261,26 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
12611261 #define HCR_CD (1ULL << 32)
12621262 #define HCR_ID (1ULL << 33)
12631263 #define HCR_E2H (1ULL << 34)
1264+#define HCR_TLOR (1ULL << 35)
1265+#define HCR_TERR (1ULL << 36)
1266+#define HCR_TEA (1ULL << 37)
1267+#define HCR_MIOCNCE (1ULL << 38)
1268+#define HCR_APK (1ULL << 40)
1269+#define HCR_API (1ULL << 41)
1270+#define HCR_NV (1ULL << 42)
1271+#define HCR_NV1 (1ULL << 43)
1272+#define HCR_AT (1ULL << 44)
1273+#define HCR_NV2 (1ULL << 45)
1274+#define HCR_FWB (1ULL << 46)
1275+#define HCR_FIEN (1ULL << 47)
1276+#define HCR_TID4 (1ULL << 49)
1277+#define HCR_TICAB (1ULL << 50)
1278+#define HCR_TOCU (1ULL << 52)
1279+#define HCR_TTLBIS (1ULL << 54)
1280+#define HCR_TTLBOS (1ULL << 55)
1281+#define HCR_ATA (1ULL << 56)
1282+#define HCR_DCT (1ULL << 57)
1283+
12641284 /*
12651285 * When we actually implement ARMv8.1-VHE we should add HCR_E2H to
12661286 * HCR_MASK and then clear it again if the feature bit is not set in