GNU Binutils with patches for OS216
修訂 | 1daf502a16e052b55a28bd52b4fde185ccc3b27b (tree) |
---|---|
時間 | 2018-01-25 01:20:05 |
作者 | Renlin Li <renlin.li@arm....> |
Commiter | Renlin Li |
[LD][AARCH64]Add group relocations to create PC-relative offset.
This is a patch to add linker support for group relocations to create a
16, 32, 48, or 64 bit PC-relative offset inline.
The following relocations are added along with the test cases:
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
bfd/
2018-01-24 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Add support for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
(_bfd_aarch64_elf_resolve_relocation): Likewise.
ld/
2018-01-24 Renlin Li <renlin.li@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Run new testes.
* testsuite/ld-aarch64/emit-relocs-287.s: Fix test case.
* testsuite/ld-aarch64/emit-relocs-287.d: Fix expected output.
* testsuite/ld-aarch64/emit-relocs-287-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-287-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-288.d: New.
* testsuite/ld-aarch64/emit-relocs-288.s: New.
* testsuite/ld-aarch64/emit-relocs-289.d: New.
* testsuite/ld-aarch64/emit-relocs-289.s: New.
* testsuite/ld-aarch64/emit-relocs-289-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-289-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-290.d: New.
* testsuite/ld-aarch64/emit-relocs-290.s: New.
* testsuite/ld-aarch64/emit-relocs-291.d: New.
* testsuite/ld-aarch64/emit-relocs-291.s: New.
* testsuite/ld-aarch64/emit-relocs-291-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-291-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-292.d: New.
* testsuite/ld-aarch64/emit-relocs-292.s: New.
* testsuite/ld-aarch64/emit-relocs-293.d: New.
* testsuite/ld-aarch64/emit-relocs-293.s: New.
@@ -1,5 +1,15 @@ | ||
1 | 1 | 2018-01-24 Renlin Li <renlin.li@arm.com> |
2 | 2 | |
3 | + * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Add support for | |
4 | + BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, | |
5 | + BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, | |
6 | + BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, | |
7 | + BFD_RELOC_AARCH64_MOVW_PREL_G3. | |
8 | + * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. | |
9 | + (_bfd_aarch64_elf_resolve_relocation): Likewise. | |
10 | + | |
11 | +2018-01-24 Renlin Li <renlin.li@arm.com> | |
12 | + | |
3 | 13 | * reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0, |
4 | 14 | BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, |
5 | 15 | BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, |
@@ -5462,6 +5462,13 @@ bad_ifunc_reloc: | ||
5462 | 5462 | case BFD_RELOC_AARCH64_ADR_HI21_PCREL: |
5463 | 5463 | case BFD_RELOC_AARCH64_ADR_LO21_PCREL: |
5464 | 5464 | case BFD_RELOC_AARCH64_LD_LO19_PCREL: |
5465 | + case BFD_RELOC_AARCH64_MOVW_PREL_G0: | |
5466 | + case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC: | |
5467 | + case BFD_RELOC_AARCH64_MOVW_PREL_G1: | |
5468 | + case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC: | |
5469 | + case BFD_RELOC_AARCH64_MOVW_PREL_G2: | |
5470 | + case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC: | |
5471 | + case BFD_RELOC_AARCH64_MOVW_PREL_G3: | |
5465 | 5472 | if (bfd_link_pic (info) |
5466 | 5473 | && (input_section->flags & SEC_ALLOC) != 0 |
5467 | 5474 | && (input_section->flags & SEC_READONLY) != 0 |
@@ -301,6 +301,10 @@ _bfd_aarch64_elf_put_addend (bfd *abfd, | ||
301 | 301 | case BFD_RELOC_AARCH64_MOVW_G0_S: |
302 | 302 | case BFD_RELOC_AARCH64_MOVW_G1_S: |
303 | 303 | case BFD_RELOC_AARCH64_MOVW_G2_S: |
304 | + case BFD_RELOC_AARCH64_MOVW_PREL_G0: | |
305 | + case BFD_RELOC_AARCH64_MOVW_PREL_G1: | |
306 | + case BFD_RELOC_AARCH64_MOVW_PREL_G2: | |
307 | + case BFD_RELOC_AARCH64_MOVW_PREL_G3: | |
304 | 308 | case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0: |
305 | 309 | case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1: |
306 | 310 | case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2: |
@@ -333,6 +337,9 @@ _bfd_aarch64_elf_put_addend (bfd *abfd, | ||
333 | 337 | case BFD_RELOC_AARCH64_MOVW_G3: |
334 | 338 | case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC: |
335 | 339 | case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1: |
340 | + case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC: | |
341 | + case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC: | |
342 | + case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC: | |
336 | 343 | case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC: |
337 | 344 | case BFD_RELOC_AARCH64_TLSDESC_OFF_G1: |
338 | 345 | case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC: |
@@ -395,6 +402,13 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type, | ||
395 | 402 | case BFD_RELOC_AARCH64_ADR_LO21_PCREL: |
396 | 403 | case BFD_RELOC_AARCH64_BRANCH19: |
397 | 404 | case BFD_RELOC_AARCH64_LD_LO19_PCREL: |
405 | + case BFD_RELOC_AARCH64_MOVW_PREL_G0: | |
406 | + case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC: | |
407 | + case BFD_RELOC_AARCH64_MOVW_PREL_G1: | |
408 | + case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC: | |
409 | + case BFD_RELOC_AARCH64_MOVW_PREL_G2: | |
410 | + case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC: | |
411 | + case BFD_RELOC_AARCH64_MOVW_PREL_G3: | |
398 | 412 | case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21: |
399 | 413 | case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19: |
400 | 414 | case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21: |
@@ -1,3 +1,27 @@ | ||
1 | +2018-01-24 Renlin Li <renlin.li@arm.com> | |
2 | + | |
3 | + * testsuite/ld-aarch64/aarch64-elf.exp: Run new testes. | |
4 | + * testsuite/ld-aarch64/emit-relocs-287.s: Fix test case. | |
5 | + * testsuite/ld-aarch64/emit-relocs-287.d: Fix expected output. | |
6 | + * testsuite/ld-aarch64/emit-relocs-287-overflow.s: New. | |
7 | + * testsuite/ld-aarch64/emit-relocs-287-overflow.d: New. | |
8 | + * testsuite/ld-aarch64/emit-relocs-288.d: New. | |
9 | + * testsuite/ld-aarch64/emit-relocs-288.s: New. | |
10 | + * testsuite/ld-aarch64/emit-relocs-289.d: New. | |
11 | + * testsuite/ld-aarch64/emit-relocs-289.s: New. | |
12 | + * testsuite/ld-aarch64/emit-relocs-289-overflow.s: New. | |
13 | + * testsuite/ld-aarch64/emit-relocs-289-overflow.d: New. | |
14 | + * testsuite/ld-aarch64/emit-relocs-290.d: New. | |
15 | + * testsuite/ld-aarch64/emit-relocs-290.s: New. | |
16 | + * testsuite/ld-aarch64/emit-relocs-291.d: New. | |
17 | + * testsuite/ld-aarch64/emit-relocs-291.s: New. | |
18 | + * testsuite/ld-aarch64/emit-relocs-291-overflow.s: New. | |
19 | + * testsuite/ld-aarch64/emit-relocs-291-overflow.d: New. | |
20 | + * testsuite/ld-aarch64/emit-relocs-292.d: New. | |
21 | + * testsuite/ld-aarch64/emit-relocs-292.s: New. | |
22 | + * testsuite/ld-aarch64/emit-relocs-293.d: New. | |
23 | + * testsuite/ld-aarch64/emit-relocs-293.s: New. | |
24 | + | |
1 | 25 | 2018-01-20 H.J. Lu <hongjiu.lu@intel.com> |
2 | 26 | |
3 | 27 | PR ld/22721 |
@@ -143,7 +143,17 @@ run_dump_test_lp64 "emit-relocs-284" | ||
143 | 143 | run_dump_test_lp64 "emit-relocs-285" |
144 | 144 | run_dump_test_lp64 "emit-relocs-286" |
145 | 145 | run_dump_test_lp64 "emit-relocs-286-bad" |
146 | -# 287-298 are not done yet | |
146 | +run_dump_test_lp64 "emit-relocs-287" | |
147 | +run_dump_test_lp64 "emit-relocs-287-overflow" | |
148 | +run_dump_test_lp64 "emit-relocs-288" | |
149 | +run_dump_test_lp64 "emit-relocs-289" | |
150 | +run_dump_test_lp64 "emit-relocs-289-overflow" | |
151 | +run_dump_test_lp64 "emit-relocs-290" | |
152 | +run_dump_test_lp64 "emit-relocs-291" | |
153 | +run_dump_test_lp64 "emit-relocs-291-overflow" | |
154 | +run_dump_test_lp64 "emit-relocs-292" | |
155 | +run_dump_test_lp64 "emit-relocs-293" | |
156 | +# 294-298 are not done yet | |
147 | 157 | run_dump_test_lp64 "emit-relocs-299" |
148 | 158 | # 300 is not done yet |
149 | 159 | run_dump_test_lp64 "emit-relocs-301" |
@@ -0,0 +1,5 @@ | ||
1 | +#source: emit-relocs-287-overflow.s | |
2 | +#ld: -T relocs.ld --defsym tempy=0x20000 --defsym tempy2=0x0 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | +#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G0 against symbol `tempy' .* | |
5 | +#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G0 against symbol `tempy2' .* |
@@ -0,0 +1,5 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + | |
4 | + movz x4, :prel_g0:tempy | |
5 | + movz x4, :prel_g0:tempy2 |
@@ -1,14 +1,10 @@ | ||
1 | 1 | #source: emit-relocs-287.s |
2 | -#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 --defsym _GOT_=0x10000 -e0 --emit-relocs | |
2 | +#ld: -T relocs.ld --defsym tempy=0x1ffff --defsym tempy2=0x4 -e0 --emit-relocs | |
3 | 3 | #objdump: -dr |
4 | 4 | |
5 | 5 | #... |
6 | - +10000: 8a000000 and x0, x0, x0 | |
7 | - +10004: 92400000 and x0, x0, #0x1 | |
8 | - +10008: d2820004 movz x4, #0x1000 | |
9 | - +10008: R_AARCH64_MOVW_PREL_G0 _GOT_ | |
10 | - +1000c: d28a0007 movz x7, #0x5000 | |
11 | - +1000c: R_AARCH64_MOVW_PREL_G0 _GOT_ | |
12 | - +10010: d2824691 movz x17, #0x1234 | |
13 | - +10010: R_AARCH64_MOVW_PREL_G0 _GOT_ | |
6 | + +10000: d29fffe4 mov x4, #0xffff // #65535 | |
7 | + 10000: R_AARCH64_MOVW_PREL_G0 tempy | |
8 | + +10004: 929ffff1 mov x17, #0xffffffffffff0000 // #-65536 | |
9 | + 10004: R_AARCH64_MOVW_PREL_G0 tempy2 | |
14 | 10 |
@@ -1,9 +1,5 @@ | ||
1 | 1 | .comm gempy,4,4 |
2 | 2 | .text |
3 | - | |
4 | - and x0,x0,x0 | |
5 | - and x0,x0,#0x1 | |
6 | - movz x4, :prel_g0:tempy | |
7 | - movz x7, :prel_g0:tempy2 | |
8 | - movz x17, :prel_g0:tempy3 | |
3 | + movz x4, :prel_g0:tempy | |
4 | + movz x17, :prel_g0:tempy2 | |
9 | 5 |
@@ -0,0 +1,11 @@ | ||
1 | +#source: emit-relocs-288.s | |
2 | +#ld: -T relocs.ld --defsym tempy=0x1ffff --defsym tempy2=0x20000 --defsym tempy3=0x0 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | + | |
5 | +#... | |
6 | + +10000: f29fffe4 movk x4, #0xffff | |
7 | + 10000: R_AARCH64_MOVW_PREL_G0_NC tempy | |
8 | + +10004: f29fff87 movk x7, #0xfffc | |
9 | + 10004: R_AARCH64_MOVW_PREL_G0_NC tempy2 | |
10 | + +10008: f29fff11 movk x17, #0xfff8 | |
11 | + 10008: R_AARCH64_MOVW_PREL_G0_NC tempy3 |
@@ -0,0 +1,5 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + movk x4, :prel_g0_nc:tempy | |
4 | + movk x7, :prel_g0_nc:tempy2 | |
5 | + movk x17, :prel_g0_nc:tempy3 |
@@ -0,0 +1,4 @@ | ||
1 | +#source: emit-relocs-289-overflow.s | |
2 | +#ld: -T relocs.ld --defsym tempy=0x1100000000 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | +#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G1 against symbol `tempy' .* |
@@ -0,0 +1,4 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + | |
4 | + movz x4, :prel_g1:tempy |
@@ -0,0 +1,10 @@ | ||
1 | +#source: emit-relocs-289.s | |
2 | +#ld: -Ttext 0x100000000 --defsym tempy=0x1ffffffff --defsym tempy2=0x4 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | + | |
5 | +#... | |
6 | + +100000000: d2bfffe4 mov x4, #0xffff0000 // #4294901760 | |
7 | + 100000000: R_AARCH64_MOVW_PREL_G1 tempy | |
8 | + +100000004: 92bffff1 mov x17, #0xffffffff0000ffff // #-4294901761 | |
9 | + 100000004: R_AARCH64_MOVW_PREL_G1 tempy2 | |
10 | + |
@@ -0,0 +1,4 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + movz x4, :prel_g1:tempy | |
4 | + movz x17, :prel_g1:tempy2 |
@@ -0,0 +1,11 @@ | ||
1 | +#source: emit-relocs-290.s | |
2 | +#ld: -Ttext=0x100000000 --defsym tempy=0x200000000 --defsym tempy2=0x1ffff0000 --defsym tempy3=0x8 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | + | |
5 | +#... | |
6 | + +100000000: f2a00004 movk x4, #0x0, lsl #16 | |
7 | + 100000000: R_AARCH64_MOVW_PREL_G1_NC tempy | |
8 | + +100000004: f2bfffc7 movk x7, #0xfffe, lsl #16 | |
9 | + 100000004: R_AARCH64_MOVW_PREL_G1_NC tempy2 | |
10 | + +100000008: f2a00011 movk x17, #0x0, lsl #16 | |
11 | + 100000008: R_AARCH64_MOVW_PREL_G1_NC tempy3 |
@@ -0,0 +1,5 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + movk x4, :prel_g1_nc:tempy | |
4 | + movk x7, :prel_g1_nc:tempy2 | |
5 | + movk x17, :prel_g1_nc:tempy3 |
@@ -0,0 +1,4 @@ | ||
1 | +#source: emit-relocs-291-overflow.s | |
2 | +#ld: -T relocs.ld --defsym tempy=0x10000000000000 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | +#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_PREL_G2 against symbol `tempy' .* |
@@ -0,0 +1,4 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + | |
4 | + movz x4, :prel_g2:tempy |
@@ -0,0 +1,11 @@ | ||
1 | +#source: emit-relocs-291.s | |
2 | +#ld: -Ttext 0x1000000000000 --defsym tempy=0x1ffffffffffff --defsym tempy2=0x1ffff00000000 -defsym tempy3=0x8 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | + | |
5 | +#... | |
6 | + +1000000000000: d2dfffe4 mov x4, #0xffff00000000 // #281470681743360 | |
7 | + 1000000000000: R_AARCH64_MOVW_PREL_G2 tempy | |
8 | + +1000000000004: d2dfffc7 mov x7, #0xfffe00000000 // #281466386776064 | |
9 | + 1000000000004: R_AARCH64_MOVW_PREL_G2 tempy2 | |
10 | + +1000000000008: 92dffff1 mov x17, #0xffff0000ffffffff // #-281470681743361 | |
11 | + 1000000000008: R_AARCH64_MOVW_PREL_G2 tempy3 |
@@ -0,0 +1,5 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + movz x4, :prel_g2:tempy | |
4 | + movz x7, :prel_g2:tempy2 | |
5 | + movz x17, :prel_g2:tempy3 |
@@ -0,0 +1,11 @@ | ||
1 | +#source: emit-relocs-292.s | |
2 | +#ld: -Ttext 0x1000000000000 --defsym tempy=0x2000000000000 --defsym tempy2=0x1ffff00000004 --defsym tempy3=0x4 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | + | |
5 | +#... | |
6 | + +1000000000000: f2c00004 movk x4, #0x0, lsl #32 | |
7 | + 1000000000000: R_AARCH64_MOVW_PREL_G2_NC tempy | |
8 | + +1000000000004: f2dfffe7 movk x7, #0xffff, lsl #32 | |
9 | + 1000000000004: R_AARCH64_MOVW_PREL_G2_NC tempy2 | |
10 | + +1000000000008: f2dffff1 movk x17, #0xffff, lsl #32 | |
11 | + 1000000000008: R_AARCH64_MOVW_PREL_G2_NC tempy3 |
@@ -0,0 +1,6 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + | |
4 | + movk x4, :prel_g2_nc:tempy | |
5 | + movk x7, :prel_g2_nc:tempy2 | |
6 | + movk x17, :prel_g2_nc:tempy3 |
@@ -0,0 +1,9 @@ | ||
1 | +#source: emit-relocs-293.s | |
2 | +#ld: -Ttext 0x1000000000000 --defsym tempy=0x2000000000000000 --defsym tempy2=0x8 -e0 --emit-relocs | |
3 | +#objdump: -dr | |
4 | + | |
5 | +#... | |
6 | + +1000000000000: d2e3ffe4 mov x4, #0x1fff000000000000 // #2305561534236983296 | |
7 | + 1000000000000: R_AARCH64_MOVW_PREL_G3 tempy | |
8 | + +1000000000004: 92e00007 movn x7, #0x0, lsl #48 | |
9 | + 1000000000004: R_AARCH64_MOVW_PREL_G3 tempy2 |
@@ -0,0 +1,5 @@ | ||
1 | +.comm gempy,4,4 | |
2 | +.text | |
3 | + | |
4 | + movz x4, :prel_g3:tempy | |
5 | + movz x7, :prel_g3:tempy2 |