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By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.


  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

發布 2009-11-01 21:58
noodlybox 0010 (1 files 隱藏)


This version is equivalent to "trunk rev124" in the repository.

Simulation using Icarus Verilog was enabled.
Please refer to ImplementationByPipe for the details.

Repositoryのtrunk rev124に相当します。

Icarus Verilogを使用したシミュレーションが可能になりました。