OSDN > 軟體搜索 > System > Embedded systems > SDK for KOBANZAME > SCM > SVN > 提交

SDK for KOBANZAME

R/O
SSH
HTTPS

kobanzame-sdk: 提交

Commit MetaInfo

修訂	46 (tree)
時間	2010-03-31 20:25:02
作者	koban

Log Message

ftell/C++/cache(VDSP++}

Change Summary

modified: trunk/kzsdk/kzversion.h (diff)
added: trunk/kzsdk/kzdev_cache.asm (diff)
added: trunk/kzsdk/kzdev_cache.h (diff)
modified: trunk/kzsdk/kzsdk.dpj (diff)
modified: trunk/kzsdk/kzdev.c (diff)
modified: trunk/kzsdk/kzstdio.c (diff)
modified: trunk/kzsdk/kzdev.h (diff)
modified: trunk/kzsdk/kzstdio.h (diff)
added: trunk/projects/main/cache_use/kernel_cfg.c (diff)
added: trunk/projects/main/cache_use/cpp_test.cpp (diff)
added: trunk/projects/main/cache_use/kernel_id.h (diff)
added: trunk/projects/main/cache_use/inclist.txt (diff)
added: trunk/projects/main/cache_use/sdkproject.dpj (diff)
added: trunk/projects/main/cache_use/main_tsk.c (diff)
added: trunk/projects/main/cache_use/sdkproject.cfg (diff)
added: trunk/projects/main/cache_use/cache.ldf (diff)
added: trunk/projects/main/cache_use/config.bat (diff)
added: trunk/projects/main/cache_use/main_tsk.h (diff)
added: trunk/projects/main/cache_use/Makefile (diff)
added: trunk/projects/main/cache_use
added: trunk/maketool/win/ADSP-BF533-proc.xml (diff)
modified: trunk/jsp/config/blackfin/start.S (diff)

差異

--- trunk/kzsdk/kzversion.h (revision 45)

+++ trunk/kzsdk/kzversion.h (revision 46)

		@@ -21,8 +21,8 @@
21	21	#define _kz_version_h_
22	22
23	23	#define KZVER_MAJOR (01)
24		-#define KZVER_MINOR (40)
25		-#define KZVER_BUILD_IDX (8)
	24	+#define KZVER_MINOR (41)
	25	+#define KZVER_BUILD_IDX (9)
26	26	#define KZVER_COPYRIGHT "KOBANZAME SDK Project"
27	27
28	28	#if TARGET_TOOL == TOOL_VDSP

--- trunk/kzsdk/kzdev_cache.h (nonexistent)

+++ trunk/kzsdk/kzdev_cache.h (revision 46)

		@@ -0,0 +1,42 @@
	1	+/*==============================================================
	2	+ *
	3	+ * kzdev_cache.h
	4	+ *
	5	+ * Cache driver for Kobanzame
	6	+ *
	7	+ *
	8	+ ==============================================================/
	9	+
	10	+#ifndef _kzdev_cache_h_
	11	+#define _kzdev_cache_h_
	12	+
	13	+/* valid defines for instruction cache */
	14	+#define INSTR_CACHE_EN
	15	+
	16	+/* valid defines for data cache */
	17	+#define DATA_CACHE_A_EN
	18	+#define DATA_CACHE_B_EN
	19	+
	20	+/* choose 1 of the following 2 when data cache enabled */
	21	+#if defined(DATA_CACHE_A_EN) && defined(DATA_CACHE_B_EN)
	22	+#define DCACHE_CONFIG ACACHE_BCACHE
	23	+#elif defined(DATA_CACHE_A_EN) && !defined(DATA_CACHE_B_EN)
	24	+#define DCACHE_CONFIG ACACHE_BSRAM
	25	+#elif !defined(DATA_CACHE_A_EN) && !defined(DATA_CACHE_B_EN)
	26	+#define DCACHE_CONFIG ASRAM_BSRAM
	27	+#else
	28	+#error Nt support A as SRAM,B as CACHE
	29	+#endif
	30	+
	31	+/* Default is Write-through. */
	32	+//#define DCACHE_WB
	33	+
	34	+/************************************************************
	35	+* Bit 9 of the ICPLB_DATAx is shown as Reserved bit *
	36	+* however, when ICACHE is used this bit needs to be *
	37	+* set to the same state as bit 12 (CPLB_L1_CHBL) *
	38	+* of this register as a workaround to anomaly: 05000258 *
	39	+*************************************************************/
	40	+#define Bit9 0x0200
	41	+
	42	+#endif // !_kzdev_cache_h_

--- trunk/kzsdk/kzdev.c (revision 45)

+++ trunk/kzsdk/kzdev.c (revision 46)

		@@ -91,6 +91,9 @@
91	91	mCycDevPol = idCycDevPol;
92	92	mTskDevPol = idTskDevPol;
93	93
	94	+ /-- cache init --/
	95	+ kzdev_cache_ini();
	96	+
94	97	/-- mmc init --/
95	98	kzdev_mmc_att_ini();
96	99

--- trunk/kzsdk/kzstdio.c (revision 45)

+++ trunk/kzsdk/kzstdio.c (revision 46)

		@@ -479,6 +479,20 @@
479	479	}
480	480	/=========================================================================/
481	481	/**
	482	+ * @fn long Kz_ftell(FILE *fp)
	483	+ * @brief Standard C Compatible function: ftell
	484	+ * @ingroup API_stdio
	485	+ * @see General Standard C documents
	486	+ * @note Renamed to standard symbol name in kzstdio.h
	487	+ */
	488	+/=========================================================================/
	489	+long Kz_ftell(FILE *fp)
	490	+{
	491	+ FIL fp_ = (FIL)fp;
	492	+ return (long)fp_->fptr;
	493	+}
	494	+/=========================================================================/
	495	+/**
482	496	* @fn size_t Kz_fread(void ptr, size_t size, size_t nmemb, FILE stream)
483	497	* @brief Standard C Compatible function: fread
484	498	* @ingroup API_stdio

--- trunk/kzsdk/kzdev.h (revision 45)

+++ trunk/kzsdk/kzdev.h (revision 46)

		@@ -62,7 +62,13 @@
62	62	void kzdev_codec_start_I2CMODE(long lSampleRate);
63	63	void kzdev_codec_stop(void);
64	64
	65	+/-- kzdev_cache.asm --/
	66	+void kzdev_cache_ini(void);
	67	+void kzdev_cache_prefetch( void *addr , int n );
	68	+void kzdev_cache_flush( void *addr, int n );
	69	+void kzdev_cache_flushInv( void *addr, int n );
65	70
	71	+
66	72	#ifdef __cplusplus
67	73	}
68	74	#endif

--- trunk/kzsdk/kzstdio.h (revision 45)

+++ trunk/kzsdk/kzstdio.h (revision 46)

		@@ -33,6 +33,8 @@
33	33	#define fclose Kz_fclose
34	34	#undef fseek
35	35	#define fseek Kz_fseek
	36	+#undef ftell
	37	+#define ftell Kz_ftell
36	38	#undef fread
37	39	#define fread Kz_fread
38	40	#undef fwrite

--- trunk/projects/main/cache_use/kernel_cfg.c (nonexistent)

+++ trunk/projects/main/cache_use/kernel_cfg.c (revision 46)

		@@ -0,0 +1,182 @@
	1	+/* Configured with [sdkproject_pp.cfg ] */
	2	+
	3	+#include "kernel_cfg.h"
	4	+#include "kernel_id.h"
	5	+
	6	+#if TKERNEL_PRVER >= 0x1040
	7	+#define CFG_INTHDR_ENTRY(inthdr) INTHDR_ENTRY(inthdr)
	8	+#define CFG_EXCHDR_ENTRY(exchdr) EXCHDR_ENTRY(exchdr)
	9	+#define CFG_INT_ENTRY(inthdr) INT_ENTRY(inthdr)
	10	+#define CFG_EXC_ENTRY(exchdr) EXC_ENTRY(exchdr)
	11	+#else
	12	+#error "This configuration file has no compatibility with TOPPERS/JSP rel 1.3 or earlier."
	13	+#endif
	14	+
	15	+#ifndef __EMPTY_LABEL
	16	+#define __EMPTY_LABEL(x,y) x y[0]
	17	+#endif
	18	+
	19	+#if TKERNEL_PRID != 0x0001u /* TOPPERS/JSP */
	20	+#error "You can not use this configuration file without TOPPERS/JSP"
	21	+#endif
	22	+
	23	+ /* User specified include files*/
	24	+#include "main_tsk.h"
	25	+#include "kobanzame.h"
	26	+#include "hw_timer.h"
	27	+#include "timer.h"
	28	+#include "hw_serial.h"
	29	+#include "serial.h"
	30	+#include "logtask.h"
	31	+
	32	+
	33	+ /* Object initializer [task] */
	34	+
	35	+#define TNUM_TSKID 4
	36	+
	37	+const ID _kernel_tmax_tskid = (TMIN_TSKID + TNUM_TSKID - 1);
	38	+
	39	+ static __STK_UNIT __stack_MAIN_TASK[__TCOUNT_STK_UNIT(4096)];
	40	+ static __STK_UNIT __stack_TSK_DEV_POL[__TCOUNT_STK_UNIT(2048)];
	41	+L1DATA_A static __STK_UNIT __stack_TSK_DEV_AUDIO[__TCOUNT_STK_UNIT(1024)];
	42	+ static __STK_UNIT __stack_LOGTASK[__TCOUNT_STK_UNIT(LOGTASK_STACK_SIZE)];
	43	+
	44	+const TINIB _kernel_tinib_table[TNUM_TSKID] = {
	45	+ {TA_HLNG \| TA_ACT, (VP_INT)(0), (FP)(main_task), INT_PRIORITY(8), __TROUND_STK_UNIT(4096), __stack_MAIN_TASK, TA_NULL, (FP)(NULL)},
	46	+ {TA_HLNG \| TA_ACT, (VP_INT)(0), (FP)(KzDevPollingTask), INT_PRIORITY(5), __TROUND_STK_UNIT(2048), __stack_TSK_DEV_POL, TA_NULL, (FP)(NULL)},
	47	+ {TA_HLNG \| TA_ACT, (VP_INT)(0), (FP)(KzAudioDspTask), INT_PRIORITY(1), __TROUND_STK_UNIT(1024), __stack_TSK_DEV_AUDIO, TA_NULL, (FP)(NULL)},
	48	+ {TA_HLNG \| TA_ACT, (VP_INT)(( VP_INT ) 1), (FP)(logtask), INT_PRIORITY(LOGTASK_PRIORITY), __TROUND_STK_UNIT(LOGTASK_STACK_SIZE), __stack_LOGTASK, TA_NULL, (FP)(NULL)}
	49	+};
	50	+
	51	+const ID _kernel_torder_table[TNUM_TSKID] = {1,2,3,4};
	52	+
	53	+TCB _kernel_tcb_table[TNUM_TSKID];
	54	+
	55	+
	56	+ /* Object initializer [semaphore] */
	57	+
	58	+#define TNUM_SEMID 5
	59	+
	60	+const ID _kernel_tmax_semid = (TMIN_SEMID + TNUM_SEMID - 1);
	61	+
	62	+const SEMINIB _kernel_seminib_table[TNUM_SEMID] = {
	63	+ {TA_TPRI, 1, 1},
	64	+ {TA_TPRI, 0, 1},
	65	+ {TA_TPRI, 1, 1},
	66	+ {TA_TPRI, 0, 1},
	67	+ {TA_TPRI, 1, 1}
	68	+};
	69	+
	70	+SEMCB _kernel_semcb_table[TNUM_SEMID];
	71	+
	72	+
	73	+ /* Object initializer [eventflag] */
	74	+
	75	+#define TNUM_FLGID 0
	76	+
	77	+const ID _kernel_tmax_flgid = (TMIN_FLGID + TNUM_FLGID - 1);
	78	+
	79	+__EMPTY_LABEL(const FLGINIB, _kernel_flginib_table);
	80	+__EMPTY_LABEL(FLGCB, _kernel_flgcb_table);
	81	+
	82	+
	83	+ /* Object initializer [dataqueue] */
	84	+
	85	+#define TNUM_DTQID 0
	86	+
	87	+const ID _kernel_tmax_dtqid = (TMIN_DTQID + TNUM_DTQID - 1);
	88	+
	89	+__EMPTY_LABEL(const DTQINIB, _kernel_dtqinib_table);
	90	+__EMPTY_LABEL(DTQCB, _kernel_dtqcb_table);
	91	+
	92	+
	93	+ /* Object initializer [mailbox] */
	94	+
	95	+#define TNUM_MBXID 0
	96	+
	97	+const ID _kernel_tmax_mbxid = (TMIN_MBXID + TNUM_MBXID - 1);
	98	+
	99	+__EMPTY_LABEL(const MBXINIB, _kernel_mbxinib_table);
	100	+__EMPTY_LABEL(MBXCB, _kernel_mbxcb_table);
	101	+
	102	+
	103	+ /* Object initializer [mempfix] */
	104	+
	105	+#define TNUM_MPFID 0
	106	+
	107	+const ID _kernel_tmax_mpfid = (TMIN_MPFID + TNUM_MPFID - 1);
	108	+
	109	+__EMPTY_LABEL(const MPFINIB, _kernel_mpfinib_table);
	110	+__EMPTY_LABEL(MPFCB, _kernel_mpfcb_table);
	111	+
	112	+
	113	+ /* Object initializer [cyclic] */
	114	+
	115	+#define TNUM_CYCID 1
	116	+
	117	+const ID _kernel_tmax_cycid = (TMIN_CYCID + TNUM_CYCID - 1);
	118	+
	119	+const CYCINIB _kernel_cycinib_table[TNUM_CYCID] = {
	120	+ {TA_HLNG,( VP_INT ) 0,(FP)(KzDevCycHander),1,1}
	121	+};
	122	+
	123	+CYCCB _kernel_cyccb_table[TNUM_CYCID];
	124	+
	125	+
	126	+ /* Object initializer [interrupt] */
	127	+
	128	+#define TNUM_INHNO 5
	129	+
	130	+const UINT _kernel_tnum_inhno = TNUM_INHNO;
	131	+
	132	+CFG_INTHDR_ENTRY(sio0_rx_handler);
	133	+CFG_INTHDR_ENTRY(sio0_tx_handler);
	134	+CFG_INTHDR_ENTRY(timer_handler);
	135	+CFG_INTHDR_ENTRY(KzISRSpi);
	136	+CFG_INTHDR_ENTRY(KzAudioISRSport0);
	137	+
	138	+const INHINIB _kernel_inhinib_table[TNUM_INHNO] = {
	139	+ {14,TA_HLNG,(FP)CFG_INT_ENTRY(sio0_rx_handler)},
	140	+ {15,TA_HLNG,(FP)CFG_INT_ENTRY(sio0_tx_handler)},
	141	+ {18,TA_HLNG,(FP)CFG_INT_ENTRY(timer_handler)},
	142	+ {INHNO_SPI,TA_HLNG,(FP)CFG_INT_ENTRY(KzISRSpi)},
	143	+ {INHNO_SPORT0_RX,TA_HLNG,(FP)CFG_INT_ENTRY(KzAudioISRSport0)}
	144	+};
	145	+
	146	+
	147	+ /* Object initializer [exception] */
	148	+
	149	+#define TNUM_EXCNO 0
	150	+
	151	+const UINT _kernel_tnum_excno = TNUM_EXCNO;
	152	+
	153	+__EMPTY_LABEL(const EXCINIB, _kernel_excinib_table);
	154	+ /* Initialization handler */
	155	+
	156	+void
	157	+_kernel_call_inirtn(void)
	158	+{
	159	+ KzAttIni( (VP_INT)(0) );
	160	+ timer_initialize( (VP_INT)(0) );
	161	+ serial_initialize( (VP_INT)(0) );
	162	+}
	163	+
	164	+void
	165	+_kernel_call_terrtn(void)
	166	+{
	167	+ timer_terminate( (VP_INT)(0) );
	168	+}
	169	+
	170	+ /* Object initialization routine */
	171	+
	172	+void
	173	+_kernel_object_initialize(void)
	174	+{
	175	+ _kernel_task_initialize();
	176	+ _kernel_semaphore_initialize();
	177	+ _kernel_cyclic_initialize();
	178	+ _kernel_interrupt_initialize();
	179	+}
	180	+
	181	+TMEVTN _kernel_tmevt_heap[TNUM_TSKID + TNUM_CYCID];
	182	+

--- trunk/projects/main/cache_use/cpp_test.cpp (nonexistent)

+++ trunk/projects/main/cache_use/cpp_test.cpp (revision 46)

		@@ -0,0 +1,132 @@
	1	+/**
	2	+ * @file cpp_test.cpp
	3	+ * @brief KOBANZAME SDK C++ Test code
	4	+ *
	5	+ * KOBANZAME SDK
	6	+ * Software Developers Kit for Blackfin DSP Evaluation Board(KOBANZAME).
	7	+ *
	8	+ * Copyright (C) 2010, KOBANZAME SDK Project, all right reserved
	9	+ *
	10	+ * LICENSE:
	11	+ * The software is a free and you can use and redistribute it for
	12	+ * personal, non-profit or commercial products. Redistributions of
	13	+ * source code must retain the above copyright notice. There is no
	14	+ * warranty in this software, if you suffer any damages by using
	15	+ * the software.
	16	+ */
	17	+
	18	+
	19	+ /--- include -----------------------------------/
	20	+#include "kobanzame.h"
	21	+
	22	+class CTestSuper {
	23	+
	24	+public:
	25	+ int mValue;
	26	+
	27	+
	28	+ CTestSuper()
	29	+ {
	30	+ mValue = 100;
	31	+ }
	32	+ virtual ~CTestSuper()
	33	+ {
	34	+ printf("CTestSuper dtor\n");
	35	+ }
	36	+
	37	+ virtual void Print( )
	38	+ {
	39	+ printf("CTestSuper::Print %d\n", mValue);
	40	+ }
	41	+ void PrintAddr()
	42	+ {
	43	+ printf("ObjAddr: 0x%08X\n",(long)this );
	44	+ }
	45	+};
	46	+
	47	+
	48	+class CTestChildA : public CTestSuper {
	49	+
	50	+public:
	51	+ CTestChildA()
	52	+ {
	53	+ mValue = 200;
	54	+ }
	55	+ virtual ~CTestChildA()
	56	+ {
	57	+ printf("CTestChildA dtor\n");
	58	+ }
	59	+ virtual void Print( )
	60	+ {
	61	+ printf("CTestChildA::Print %d\n", mValue);
	62	+ }
	63	+};
	64	+
	65	+ /--- Global -----------------------------------/
	66	+
	67	+CTestSuper gSuper;
	68	+CTestChildA gChildA;
	69	+
	70	+extern "C"
	71	+void CppTest()
	72	+{
	73	+ gSuper.PrintAddr();
	74	+ gSuper.Print();
	75	+ gChildA.PrintAddr();
	76	+ gChildA.Print();
	77	+}
	78	+
	79	+extern "C"
	80	+void CppNewTest()
	81	+{
	82	+ CTestSuper *super = new CTestSuper;
	83	+ super->PrintAddr();
	84	+ super->Print();
	85	+ delete super;
	86	+
	87	+ CTestChildA *child = new CTestChildA;
	88	+ child->PrintAddr();
	89	+ child->Print();
	90	+ delete child;
	91	+
	92	+}
	93	+
	94	+
	95	+extern "C"
	96	+L3CODE
	97	+void HeapTest(UW bytes)
	98	+{
	99	+ B *heap = new B[bytes];
	100	+
	101	+ if( heap == 0 )
	102	+ {
	103	+ printf("Heap Cannot Allocate\n");
	104	+ }
	105	+ else
	106	+ {
	107	+ B test_dat = 0;
	108	+ const B test_end_val = 77;
	109	+ for( UW i=0;i<bytes;++i )
	110	+ {
	111	+ heap[i] = test_dat++;
	112	+ if( test_dat == test_end_val) test_dat = 0;
	113	+ }
	114	+
	115	+ // Verify
	116	+ test_dat = 0;
	117	+ for( UW i=0;i<bytes;++i )
	118	+ {
	119	+ if( heap[i] != test_dat++ )
	120	+ {
	121	+ printf("Heap Verify Error\n");
	122	+ delete[] heap;
	123	+ return;
	124	+ }
	125	+ if( test_dat == test_end_val) test_dat = 0;
	126	+ }
	127	+
	128	+ delete[] heap;
	129	+ printf(" Heap Test OK\n");
	130	+ }
	131	+
	132	+}

--- trunk/projects/main/cache_use/kernel_id.h (nonexistent)

+++ trunk/projects/main/cache_use/kernel_id.h (revision 46)

		@@ -0,0 +1,18 @@
	1	+#ifndef KERNEL_ID_H
	2	+#define KERNEL_ID_H
	3	+
	4	+ /* object identifier deifnition */
	5	+
	6	+#define CYC_DEV_POL 1
	7	+#define LOGTASK 4
	8	+#define MAIN_TASK 1
	9	+#define SEM_FS 3
	10	+#define SEM_SPI 1
	11	+#define SERIAL_RCV_SEM1 4
	12	+#define SERIAL_SND_SEM1 5
	13	+#define SIG_SPI 2
	14	+#define TSK_DEV_AUDIO 3
	15	+#define TSK_DEV_POL 2
	16	+
	17	+#endif /* KERNEL_ID_H */
	18	+

--- trunk/projects/main/cache_use/inclist.txt (nonexistent)

+++ trunk/projects/main/cache_use/inclist.txt (revision 46)

		@@ -0,0 +1,9 @@
	1	+..\..\..\jsp\kernel
	2	+..\..\..\jsp\include
	3	+..\..\..\jsp\systask
	4	+..\..\..\jsp\pdic\simple_sio
	5	+..\..\..\jsp\config\blackfin
	6	+..\..\..\jsp\config\blackfin\kobanzame
	7	+..\..\..\jsp\config\blackfin\_common_bf533
	8	+..\..\..\kzsdk
	9	+..\..\..\fatfs\src

--- trunk/projects/main/cache_use/main_tsk.c (nonexistent)

+++ trunk/projects/main/cache_use/main_tsk.c (revision 46)

		@@ -0,0 +1,86 @@
	1	+/**
	2	+ * @file main_task.c
	3	+ * @brief KOBANZAME SDK Sample Task
	4	+ *
	5	+ * KOBANZAME SDK
	6	+ * Software Developers Kit for Blackfin DSP Evaluation Board(KOBANZAME).
	7	+ *
	8	+ * Copyright (C) 2010, KOBANZAME SDK Project, all right reserved
	9	+ *
	10	+ * LICENSE:
	11	+ * The software is a free and you can use and redistribute it for
	12	+ * personal, non-profit or commercial products. Redistributions of
	13	+ * source code must retain the above copyright notice. There is no
	14	+ * warranty in this software, if you suffer any damages by using
	15	+ * the software.
	16	+ */
	17	+
	18	+ /--- include -----------------------------------/
	19	+#include "kobanzame.h"
	20	+
	21	+ /--- Extern -----------------------------------/
	22	+extern void CppTest(void);
	23	+extern void CppNewTest(void);
	24	+extern void HeapTest(UW bytes);
	25	+
	26	+/=========================================================================/
	27	+/**
	28	+ * @fn void main_task(VP_INT exinf)
	29	+ * @brief Main Task
	30	+ * @param extinf from uITRON Configurator
	31	+ */
	32	+/=========================================================================/
	33	+void main_task(VP_INT exinf)
	34	+{
	35	+ /*
	36	+ * Display SDK Version and Copyright
	37	+ */
	38	+ printf("Start KOBANZEM SDK Sample Project\n");
	39	+ printf("KOBANZAME SDK Version : %d.%02d(%04d)\n",KzGetVersionMajor(), KzGetVersionMinor(), KzGetBuildIdx() );
	40	+ printf(" Build Date: %s\n", KzGetBuildDate() );
	41	+ printf(" Copyright : %s\n", KzGetCopyRight() );
	42	+
	43	+
	44	+ CppTest();
	45	+ CppNewTest();
	46	+ HeapTest( 1024102431 );
	47	+
	48	+ /*
	49	+ * Filesystem Start, Insert SD-Card before program start
	50	+ */
	51	+ if( KzFilesystemStart() == KZ_OK )
	52	+ {
	53	+ /*
	54	+ * Filesystem success to start
	55	+ */
	56	+ printf("SD-Card Ready, Filesystem start\n");
	57	+
	58	+ /* Add Filesystem relative commands. */
	59	+ KzAddCmdFilesystem();
	60	+
	61	+ }
	62	+ else
	63	+ printf("SD-Card not Ready.\n");
	64	+
	65	+ /*
	66	+ * Add Device Driver Command
	67	+ */
	68	+ KzAddCmdDeviceDriver();
	69	+
	70	+#if 0
	71	+ /* Stdio Test for SDK develop */
	72	+ KzAddCmdStdioTest();
	73	+#endif
	74	+
	75	+ /*
	76	+ * Command line start
	77	+ * This function doesn't return until exit command is issued in the command line.
	78	+ */
	79	+ KzCmdlineStart();
	80	+
	81	+ /*
	82	+ *　End main task
	83	+ */
	84	+ printf("\nExit Command Line\n");
	85	+ ext_tsk();
	86	+}

--- trunk/projects/main/cache_use/config.bat (nonexistent)

+++ trunk/projects/main/cache_use/config.bat (revision 46)

		@@ -0,0 +1,20 @@
	1	+rem このbatはsuikan氏のjsp for blackfinから複製し改変したものである
	2	+rem APPNAME アプリケーション名
	3	+rem CFGPATH cfg.exeが置いてあるディレクトリ
	4	+rem VDSPPATH VisualDSP++のインストールディレクトリ
	5	+rem JSPPATH TOPPERS/JSPのディレクトリ
	6	+rem CPATH Blackfin CPU依存部のディレクトリ
	7	+rem SPATH システム依存部のディレクトリ
	8	+rem KZPATH KOBANZAMEのlibディレクトリ
	9	+
	10	+set APPNAME=sdkproject
	11	+set CFGPATH=..\..\..\maketool\win
	12	+set VDSPPATH=c:\Program Files\Analog Devices\VisualDSP 5.0
	13	+set JSPPATH=..\..\..\jsp
	14	+set CPATH=%JSPPATH%\config\blackfin
	15	+set SPATH=%CPATH%\ezkit_bf533;%CPATH%\_common_bf533
	16	+set KZPATH=..\..\..\lib
	17	+
	18	+"%VDSPPATH%\pp.exe" %APPNAME%.cfg -D__ECC__ -D__ADSPLPBLACKFIN__ -I"%CPATH%;%SPATH%;%JSPPATH%\systask;%JSPPATH%\include;%KZPATH%" > %APPNAME%_pp.cfg
	19	+"%CFGPATH%\cfg.exe" %APPNAME%_pp.cfg
	20	+del %APPNAME%_pp.cfg

--- trunk/projects/main/cache_use/main_tsk.h (nonexistent)

+++ trunk/projects/main/cache_use/main_tsk.h (revision 46)

		@@ -0,0 +1,44 @@
	1	+/**
	2	+ * @file main_tsk.h
	3	+ * @brief KOBANZAME SDK Main Task
	4	+ *
	5	+ * KOBANZAME SDK
	6	+ * Software Developers Kit for Blackfin DSP Evaluation Board(KOBANZAME).
	7	+ *
	8	+ * Copyright (C) 2010, KOBANZAME SDK Project, all right reserved
	9	+ *
	10	+ * LICENSE:
	11	+ * The software is a free and you can use and redistribute it for
	12	+ * personal, non-profit or commercial products. Redistributions of
	13	+ * source code must retain the above copyright notice. There is no
	14	+ * warranty in this software, if you suffer any damages by using
	15	+ * the software.
	16	+ */
	17	+
	18	+
	19	+#ifndef _main_tsk_h_
	20	+#define _main_tsk_h_
	21	+
	22	+#ifndef _MACRO_ONLY
	23	+/--- include -----------------------------------/
	24	+#include "kobanzame.h"
	25	+
	26	+/--- global functions --------------------------/
	27	+extern void main_task( VP_INT arg );
	28	+
	29	+#endif /* !_MACRO_ONLY */
	30	+
	31	+/--- define ------------------------------------/
	32	+
	33	+/** @define MAIN_TSK_PRI
	34	+ * メインタスクの優先順位　1 〜 16　までの値(1が優先度大)
	35	+ */
	36	+#define MAIN_TSK_PRI 8
	37	+
	38	+/** @define MAIN_TSK_STKSIZE
	39	+ * メインタスクのスタックサイズ
	40	+ */
	41	+#define MAIN_TSK_STKSIZE 4096
	42	+
	43	+
	44	+#endif

--- trunk/projects/main/cache_use/Makefile (nonexistent)

+++ trunk/projects/main/cache_use/Makefile (revision 46)

		@@ -0,0 +1,534 @@
	1	+#
	2	+# TOPPERS/JSP Kernel
	3	+# Toyohashi Open Platform for Embedded Real-Time Systems/
	4	+# Just Standard Profile Kernel
	5	+#
	6	+# Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
	7	+# Toyohashi Univ. of Technology, JAPAN
	8	+# Copyright (C) 2005 by Embedded and Real-Time Systems Laboratory
	9	+# Graduate School of Information Science, Nagoya Univ., JAPAN
	10	+#
	11	+# 上記著作権者は，以下の (1)縲鰀(4) の条件か，Free Software Foundation
	12	+# によって公表されている GNU General Public License の Version 2 に記
	13	+# 述されている条件を満たす場合に限り，本ソフトウェア（本ソフトウェア
	14	+# を改変したものを含む．以下同じ）を使用・複製・改変・再配布（以下，
	15	+# 利用と呼ぶ）することを無償で許諾する．
	16	+# (1) 本ソフトウェアをソースコードの形で利用する場合には，上記の著作
	17	+# 権表示，この利用条件および下記の無保証規定が，そのままの形でソー
	18	+# スコード中に含まれていること．
	19	+# (2) 本ソフトウェアを，ライブラリ形式など，他のソフトウェア開発に使
	20	+# 用できる形で再配布する場合には，再配布に伴うドキュメント（利用
	21	+# 者マニュアルなど）に，上記の著作権表示，この利用条件および下記
	22	+# の無保証規定を掲載すること．
	23	+# (3) 本ソフトウェアを，機器に組み込むなど，他のソフトウェア開発に使
	24	+# 用できない形で再配布する場合には，次のいずれかの条件を満たすこ
	25	+# と．
	26	+# (a) 再配布に伴うドキュメント（利用者マニュアルなど）に，上記の著
	27	+# 作権表示，この利用条件および下記の無保証規定を掲載すること．
	28	+# (b) 再配布の形態を，別に定める方法によって，TOPPERSプロジェクトに
	29	+# 報告すること．
	30	+# (4) 本ソフトウェアの利用により直接的または間接的に生じるいかなる損
	31	+# 害からも，上記著作権者およびTOPPERSプロジェクトを免責すること．
	32	+#
	33	+# 本ソフトウェアは，無保証で提供されているものである．上記著作権者お
	34	+# よびTOPPERSプロジェクトは，本ソフトウェアに関して，その適用可能性も
	35	+# 含めて，いかなる保証も行わない．また，本ソフトウェアの利用により直
	36	+# 接的または間接的に生じたいかなる損害に関しても，その責任を負わない．
	37	+#
	38	+# @(#) $Id: Makefile,v 1.5 2009/07/26 02:09:12 suikan Exp $
	39	+#
	40	+
	41	+#
	42	+# ターゲットの指定（Makefile.config で上書きされるのを防ぐため）
	43	+#
	44	+all:
	45	+
	46	+#
	47	+# ターゲット名の定義
	48	+#
	49	+CPU = blackfin
	50	+SYS = kobanzame
	51	+TOOL =
	52	+
	53	+#
	54	+# プログラミング言語の定義
	55	+#
	56	+PROGRAM_LANG =
	57	+ifeq ($(PROGRAM_LANG),c++)
	58	+ USE_CXX = true
	59	+ CXXLIBS = -lstdc++ -lm -lc
	60	+ CXXRTS = cxxrt.o newlibrt.o
	61	+endif
	62	+
	63	+
	64	+#
	65	+# ソースファイルのディレクトリの定義
	66	+#
	67	+SRCDIR = ../../../jsp
	68	+
	69	+
	70	+#
	71	+# for KOBANZAME SDK
	72	+#
	73	+KZLIB = ../../../lib
	74	+KZSDK = ../../../kzsdk
	75	+FSYS = ../../../fatfs/src
	76	+
	77	+KZLIB_DIR := $(KZLIB_DIR):$(KZLIB)
	78	+KZSDK_DIR := $(KZSDK_DIR):$(KZSDK)
	79	+FSYS_DIR := $(FSYS_DIR):$(FSYS)
	80	+
	81	+include $(KZLIB)/Makefile.lib
	82	+include $(KZSDK)/Makefile.sdk
	83	+include $(FSYS)/Makefile.fsys
	84	+
	85	+
	86	+#
	87	+# オブジェクトファイル名の拡張子の設定
	88	+#
	89	+OBJEXT =
	90	+
	91	+#
	92	+# 実行環境の定義（どれにも該当しない場合は，すべてコメントアウトする）
	93	+# （ターゲット依存に上書きされる場合がある）
	94	+#
	95	+DBGENV := GDB_STUB
	96	+
	97	+#
	98	+# カーネルライブラリ（libkernel.a）のディレクトリ名
	99	+# （カーネルライブラリも make 対象にする時は，空に定義する）
	100	+#
	101	+KERNEL_LIB =
	102	+
	103	+#
	104	+# ターゲット依存の定義のインクルード
	105	+#
	106	+ifdef TOOL
	107	+ ifdef SYS
	108	+ include $(SRCDIR)/config/$(CPU)-$(TOOL)/$(SYS)/Makefile.config
	109	+ endif
	110	+ include $(SRCDIR)/config/$(CPU)-$(TOOL)/Makefile.config
	111	+else
	112	+ ifdef SYS
	113	+ include $(SRCDIR)/config/$(CPU)/$(SYS)/Makefile.config
	114	+ endif
	115	+ include $(SRCDIR)/config/$(CPU)/Makefile.config
	116	+endif
	117	+
	118	+#
	119	+# 共通コンパイルオプションの定義
	120	+#
	121	+COPTS := $(COPTS)
	122	+CDEFS := $(CDEFS)
	123	+INCLUDES := -I. -I$(SRCDIR)/include $(INCLUDES)
	124	+# LDFLAGS := -nostdlib $(LDFLAGS)
	125	+LDFLAGS := -nostartfiles $(LDFLAGS)
	126	+LIBS := $(LIBS) $(CXXLIBS) -lgcc
	127	+CFLAGS = $(COPTS) $(CDEFS) $(INCLUDES)
	128	+
	129	+#
	130	+# アプリケーションプログラムに関する定義
	131	+#
	132	+UNAME = sdkproject
	133	+UTASK_CFG = $(UNAME).cfg
	134	+
	135	+UTASK_DIR = $(SRCDIR)/library
	136	+UTASK_ASMOBJS =
	137	+ifdef USE_CXX
	138	+ UTASK_CXXOBJS = main_tsk.o
	139	+ UTASK_COBJS =
	140	+else
	141	+ UTASK_COBJS = main_tsk.o
	142	+endif
	143	+UTASK_CFLAGS =
	144	+UTASK_LIBS =
	145	+
	146	+#
	147	+# システムサービスに関する定義
	148	+#
	149	+STASK_DIR := $(STASK_DIR):$(SRCDIR)/systask:$(SRCDIR)/library
	150	+STASK_ASMOBJS := $(STASK_ASMOBJS)
	151	+STASK_COBJS := $(STASK_COBJS) timer.o serial.o logtask.o \
	152	+ log_output.o vasyslog.o t_perror.o strerror.o \
	153	+ $(CXXRTS)
	154	+STASK_CFLAGS := $(STASK_CFLAGS) -I$(SRCDIR)/systask
	155	+STASK_LIBS := $(STASK_LIBS)
	156	+
	157	+#
	158	+# カーネルに関する定義
	159	+#
	160	+# KERNEL_ASMOBJS: カーネルライブラリに含める，ソースがアセンブリ言語の
	161	+# オブジェクトファイル．
	162	+# KERNEL_COBJS: カーネルのライブラリに含める，ソースがC言語で，ソース
	163	+# ファイルと1対1に対応するオブジェクトファイル．
	164	+# KERNEL_LCSRCS: カーネルのライブラリに含めるC言語のソースファイルで，
	165	+# 1つのソースファイルから複数のオブジェクトファイルを生
	166	+# 成するもの（Makefile.kernel で定義）．
	167	+# KERNEL_LCOBJS: 上のソースファイルから生成されるオブジェクトファイル
	168	+# （Makefile.kernel で定義）．
	169	+# KERNEL_AUX_COBJS: ロードモジュールに含めないが，カーネルのソースファ
	170	+# イルと同じオプションを適用してコンパイルすべきファ
	171	+# イル．
	172	+#
	173	+KERNEL = $(SRCDIR)/kernel
	174	+KERNEL_DIR := $(KERNEL_DIR):$(KERNEL)
	175	+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
	176	+KERNEL_COBJS := startup.o banner.o $(KERNEL_COBJS)
	177	+KERNEL_CFLAGS := $(KERNEL_CFLAGS) -I$(KERNEL)
	178	+ifdef OMIT_MAKEOFFSET
	179	+ OFFSET_H =
	180	+ KERNEL_AUX_COBJS = kernel_chk.o
	181	+else
	182	+ OFFSET_H = offset.h
	183	+ KERNEL_AUX_COBJS = makeoffset.o kernel_chk.o
	184	+endif
	185	+
	186	+#
	187	+# オブジェクトファイル名の定義
	188	+#
	189	+OBJNAME = jsp
	190	+ifdef OBJEXT
	191	+ OBJFILE = $(OBJNAME).$(OBJEXT)
	192	+else
	193	+ OBJFILE = $(OBJNAME)
	194	+endif
	195	+
	196	+#
	197	+# ターゲットファイル（複数を同時に選択してはならない）
	198	+#
	199	+#all: $(OBJFILE)
	200	+all: $(OBJNAME).dxe
	201	+#all: $(OBJNAME).bin
	202	+#all: $(OBJNAME).srec
	203	+
	204	+#
	205	+# カーネルのコンフィギュレーションファイルの生成
	206	+#
	207	+kernel_cfg.c kernel_id.h kernel_chk.c: $(UTASK_CFG)
	208	+ $(CC) -E $(INCLUDES) $(CDEFS) -x c-header $(UTASK_CFG) > tmpfile1
	209	+ $(SRCDIR)/cfg/cfg -s tmpfile1 -c -obj -cpu $(CPU) -system $(SYS)
	210	+ rm -f tmpfile1
	211	+
	212	+##### 以下は編集しないこと #####
	213	+
	214	+#
	215	+# 環境に依存するコンパイルオプションの定義
	216	+#
	217	+ifdef DBGENV
	218	+ CDEFS := $(CDEFS) -D$(DBGENV)
	219	+endif
	220	+
	221	+#
	222	+# カーネルライブラリに関連する定義
	223	+#
	224	+ifdef KERNEL_LIB
	225	+ MAKE_KERNEL =
	226	+ LIBKERNEL = $(KERNEL_LIB)/libkernel.a
	227	+else
	228	+ MAKE_KERNEL = libkernel.a
	229	+ LIBKERNEL = $(MAKE_KERNEL)
	230	+endif
	231	+
	232	+#
	233	+# カーネルのファイル構成の定義
	234	+#
	235	+include $(KERNEL)/Makefile.kernel
	236	+
	237	+#
	238	+# $(OBJNAME).chk の生成規則（静的APIのパラメータチェック）
	239	+#
	240	+$(OBJNAME).chk: kernel_chk.s $(SRCDIR)/utils/gencheck
	241	+ $(PERL) $(SRCDIR)/utils/gencheck kernel_chk.s > tmpfile2
	242	+ mv tmpfile2 $(OBJNAME).chk
	243	+
	244	+#
	245	+# offset.h の生成規則（構造体内のオフセット値の算出）
	246	+#
	247	+offset.h: makeoffset.s $(SRCDIR)/utils/genoffset
	248	+ $(PERL) $(SRCDIR)/utils/genoffset makeoffset.s > tmpfile3
	249	+ mv tmpfile3 offset.h
	250	+
	251	+#
	252	+# ソースファイルのあるディレクトリに関する定義
	253	+#
	254	+TEST_DIR := $(SRCDIR)/../
	255	+vpath %.c $(KERNEL_DIR):$(STASK_DIR):$(UTASK_DIR):$(TEST_DIR)
	256	+vpath %.S $(KERNEL_DIR):$(STASK_DIR):$(UTASK_DIR)
	257	+
	258	+#
	259	+# コンパイルのための変数の定義
	260	+#
	261	+KERNEL_LIB_OBJS = $(KERNEL_ASMOBJS) $(KERNEL_COBJS) $(KERNEL_LCOBJS)
	262	+STASK_OBJS = $(STASK_ASMOBJS) $(STASK_COBJS)
	263	+UTASK_OBJS = $(UTASK_ASMOBJS) $(UTASK_COBJS) $(UTASK_CXXOBJS)
	264	+TASK_OBJS = $(UTASK_OBJS) $(STASK_OBJS) kernel_cfg.o
	265	+ALL_OBJS = $(START_OBJS) $(TASK_OBJS) $(END_OBJS)
	266	+ALL_LIBS = $(UTASK_LIBS) $(STASK_LIBS) $(LIBKERNEL) $(LIBS)
	267	+
	268	+ifdef TEXT_START_ADDRESS
	269	+ LDFLAGS := $(LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
	270	+endif
	271	+ifdef DATA_START_ADDRESS
	272	+ LDFLAGS := $(LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
	273	+endif
	274	+ifdef LDSCRIPT
	275	+ LDFLAGS := $(LDFLAGS) -T $(SRCDIR)/config/$(LDSCRIPT)
	276	+endif
	277	+
	278	+#
	279	+# カーネルライブラリファイルの生成
	280	+#
	281	+libkernel.a: $(OFFSET_H) $(KERNEL_LIB_OBJS)
	282	+ rm -f libkernel.a
	283	+ $(AR) -rcs libkernel.a $(KERNEL_LIB_OBJS)
	284	+ $(RANLIB) libkernel.a
	285	+
	286	+#
	287	+# 全体のリンク
	288	+# $(OBJCOPY) -R ... はGDB用に定義したデバッグ用MMRのメモリ実体を剥ぎ取り、シンボルだけ残すためのもの。
	289	+#
	290	+$(OBJFILE): Makefile.depend $(ALL_OBJS) $(MAKE_KERNEL) $(OBJNAME).chk
	291	+ $(LINK) $(CFLAGS) $(LDFLAGS) -o $(OBJFILE) \
	292	+ $(START_OBJS) $(TASK_OBJS) $(ALL_LIBS) $(END_OBJS)
	293	+ $(NM) $(OBJFILE) > $(OBJNAME).syms
	294	+ $(OBJCOPY) -R .bss.sysmmr -R .bss.coremmr $(OBJFILE)
	295	+ $(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
	296	+ $(SRCDIR)/cfg/chk -m $(OBJNAME).syms,$(OBJNAME).srec \
	297	+ -obj -cs $(OBJNAME).chk -cpu $(CPU) -system $(SYS)
	298	+
	299	+#
	300	+# DXEファイルの生成
	301	+#
	302	+$(OBJNAME).dxe: $(OBJFILE)
	303	+ $(OBJCOPY) -R .comment --strip-all $(OBJFILE) $(OBJNAME).dxe
	304	+
	305	+#
	306	+# バイナリファイルの生成
	307	+#
	308	+$(OBJNAME).bin: $(OBJFILE)
	309	+ $(OBJCOPY) -O binary -S $(OBJFILE) $(OBJNAME).bin
	310	+
	311	+#
	312	+# Sレコードファイルの生成
	313	+#
	314	+$(OBJNAME).srec: $(OBJFILE)
	315	+ $(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
	316	+
	317	+#
	318	+# コンパイル結果の消去
	319	+#
	320	+clean:
	321	+ rm -f \#* ~ .o tmpfile?
	322	+ rm -f $(MAKE_KERNEL) $(OBJNAME)
	323	+ rm -f $(OBJNAME).syms $(OBJNAME).srec $(OBJNAME).chk
	324	+ rm -f $(OBJNAME).exe $(OBJNAME).bin $(OBJNAME).out
	325	+ rm -f kernel_cfg.c kernel_chk.c kernel_chk.s kernel_id.h kernel_obj.dat
	326	+ rm -f makeoffset.s offset.h
	327	+
	328	+cleankernel:
	329	+ rm -rf $(KERNEL_LIB_OBJS)
	330	+ rm -f makeoffset.s offset.h
	331	+
	332	+cleandep:
	333	+ rm -f Makefile.depend
	334	+
	335	+realclean: cleandep clean
	336	+
	337	+#
	338	+# kernel_cfg.c のコンパイルルールと依存関係作成ルールの定義
	339	+#
	340	+# kernel_cfg.c は，アプリケーションプログラム用，システムサービス用，
	341	+# カーネル用のすべてのオプションを付けてコンパイルする．
	342	+#
	343	+KERNEL_CFG_CFLAGS = $(UTASK_CFLAGS) $(STASK_CFLAGS) $(KERNEL_CFLAGS)
	344	+
	345	+kernel_cfg.o: kernel_cfg.c
	346	+ $(CC) -c $(CFLAGS) $(KERNEL_CFG_CFLAGS) $<
	347	+
	348	+kernel_cfg.s: kernel_cfg.c
	349	+ $(CC) -S $(CFLAGS) $(KERNEL_CFG_CFLAGS) $<
	350	+
	351	+kernel_cfg.d: kernel_cfg.c
	352	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	353	+ -O "$(CFLAGS) $(KERNEL_CFG_CFLAGS)" $< >> Makefile.depend
	354	+
	355	+#
	356	+# 特別な依存関係の定義
	357	+#
	358	+banner.o: $(filter-out banner.o,$(KERNEL_LIB_OBJS))
	359	+
	360	+#
	361	+# 特殊な依存関係作成ルールの定義
	362	+#
	363	+kernel_id.d: $(UTASK_CFG)
	364	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) -X \
	365	+ -T "kernel_cfg.c kernel_id.h kernel_chk.c" \
	366	+ -O "$(INCLUDES)" $< >> Makefile.depend
	367	+
	368	+makeoffset.d: makeoffset.c
	369	+ @$(PERL) $(SRCDIR)/utils/makedep -s -C $(CC) \
	370	+ -O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
	371	+
	372	+kernel_chk.d: kernel_chk.c
	373	+ @$(PERL) $(SRCDIR)/utils/makedep -s -C $(CC) \
	374	+ -O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
	375	+
	376	+#
	377	+# 依存関係ファイルの生成
	378	+#
	379	+gendepend:
	380	+ @echo "Generating Makefile.depend."
	381	+
	382	+ifdef KERNEL_LIB
	383	+depend: cleandep kernel_cfg.c gendepend kernel_id.d \
	384	+ kernel_chk.d $(ALL_OBJS:.o=.d)
	385	+else
	386	+depend: cleandep $(OFFSET_H) kernel_cfg.c gendepend kernel_id.d \
	387	+ $(KERNEL_AUX_COBJS:.o=.d) $(KERNEL_ASMOBJS:.o=.d) \
	388	+ $(KERNEL_COBJS:.o=.d) $(KERNEL_LCSRCS:.c=.d) $(ALL_OBJS:.o=.d)
	389	+endif
	390	+
	391	+#
	392	+# 依存関係ファイルをインクルード
	393	+#
	394	+-include Makefile.depend
	395	+
	396	+#
	397	+# 開発ツールのコマンド名の定義
	398	+#
	399	+ifndef TOOL
	400	+ #
	401	+ # GNU開発環境用
	402	+ #
	403	+ ifdef TARGET
	404	+ TARGET_PREFIX = $(TARGET)-
	405	+ else
	406	+ TARGET_PREFIX =
	407	+ endif
	408	+ CC = $(TARGET_PREFIX)gcc
	409	+ CXX = $(TARGET_PREFIX)g++
	410	+ AS = $(TARGET_PREFIX)as
	411	+ LD = $(TARGET_PREFIX)ld
	412	+ AR = $(TARGET_PREFIX)ar
	413	+ NM = $(TARGET_PREFIX)nm
	414	+ RANLIB = $(TARGET_PREFIX)ranlib
	415	+ OBJCOPY = $(TARGET_PREFIX)objcopy
	416	+ OBJDUMP = $(TARGET_PREFIX)objdump
	417	+else
	418	+ TARGET_PREFIX =
	419	+endif
	420	+
	421	+ifdef USE_CXX
	422	+ LINK = $(CXX)
	423	+else
	424	+ LINK = $(CC)
	425	+endif
	426	+
	427	+PERL =
	428	+
	429	+#
	430	+# コンパイルルールの定義
	431	+#
	432	+KERNEL_ALL_COBJS = $(KERNEL_COBJS) $(KERNEL_AUX_COBJS)
	433	+
	434	+$(KERNEL_ALL_COBJS): %.o: %.c
	435	+ $(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
	436	+
	437	+$(KERNEL_ALL_COBJS:.o=.s): %.s: %.c
	438	+ $(CC) -S $(CFLAGS) $(KERNEL_CFLAGS) $<
	439	+
	440	+$(KERNEL_LCOBJS): %.o:
	441	+ $(CC) -D__$(*F) -o $@ -c $(CFLAGS) $(KERNEL_CFLAGS) $<
	442	+
	443	+$(KERNEL_LCOBJS:.o=.s): %.s:
	444	+ $(CC) -D__$(*F) -o $@ -S $(CFLAGS) $(KERNEL_CFLAGS) $<
	445	+
	446	+$(KERNEL_ASMOBJS): %.o: %.S
	447	+ $(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
	448	+
	449	+$(STASK_COBJS): %.o: %.c
	450	+ $(CC) -c $(CFLAGS) $(STASK_CFLAGS) $<
	451	+
	452	+$(STASK_COBJS:.o=.s): %.s: %.c
	453	+ $(CC) -S $(CFLAGS) $(STASK_CFLAGS) $<
	454	+
	455	+$(STASK_ASMOBJS): %.o: %.S
	456	+ $(CC) -c $(CFLAGS) $(STASK_CFLAGS) $<
	457	+
	458	+$(UTASK_COBJS): %.o: %.c
	459	+ $(CC) -c $(CFLAGS) $(UTASK_CFLAGS) $<
	460	+
	461	+$(UTASK_COBJS:.o=.s): %.s: %.c
	462	+ $(CC) -S $(CFLAGS) $(UTASK_CFLAGS) $<
	463	+
	464	+$(UTASK_CXXOBJS): %.o: %.cpp
	465	+ $(CXX) -c $(CFLAGS) $(UTASK_CFLAGS) $<
	466	+
	467	+$(UTASK_CXXOBJS:.o=.s): %.s: %.cpp
	468	+ $(CXX) -S $(CFLAGS) $(UTASK_CFLAGS) $<
	469	+
	470	+$(UTASK_ASMOBJS): %.o: %.S
	471	+ $(CC) -c $(CFLAGS) $(UTASK_CFLAGS) $<
	472	+
	473	+#
	474	+# 依存関係作成ルールの定義
	475	+#
	476	+$(KERNEL_COBJS:.o=.d): %.d: %.c
	477	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	478	+ -O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
	479	+
	480	+$(KERNEL_LCSRCS:.c=.d): %.d: %.c
	481	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) -T "$($*)" \
	482	+ -O "$(foreach sym,$($*),-D__$(sym:.o=)) \
	483	+ $(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
	484	+
	485	+$(KERNEL_LCOBJS:.o=.d): %.d:
	486	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) -T $*.o \
	487	+ -O "-D__$(*F) $(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
	488	+
	489	+$(KERNEL_ASMOBJS:.o=.d): %.d: %.S
	490	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	491	+ -O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
	492	+
	493	+$(STASK_COBJS:.o=.d): %.d: %.c
	494	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	495	+ -O "$(CFLAGS) $(STASK_CFLAGS)" $< >> Makefile.depend
	496	+
	497	+$(STASK_ASMOBJS:.o=.d): %.d: %.S
	498	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	499	+ -O "$(CFLAGS) $(STASK_CFLAGS)" $< >> Makefile.depend
	500	+
	501	+$(UTASK_COBJS:.o=.d): %.d: %.c
	502	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	503	+ -O "$(CFLAGS) $(UTASK_CFLAGS)" $< >> Makefile.depend
	504	+
	505	+$(UTASK_CXXOBJS:.o=.d): %.d: %.cpp
	506	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CXX) \
	507	+ -O "$(CFLAGS) $(UTASK_CFLAGS)" $< >> Makefile.depend
	508	+
	509	+$(UTASK_ASMOBJS:.o=.d): %.d: %.S
	510	+ @$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
	511	+ -O "$(CFLAGS) $(UTASK_CFLAGS)" $< >> Makefile.depend
	512	+
	513	+#
	514	+# デフォルトコンパイルルールを上書き
	515	+#
	516	+%.o: %.c
	517	+ @echo "*** Default compile rules should not be used."
	518	+ $(CC) -c $(CFLAGS) $<
	519	+
	520	+%.s: %.c
	521	+ @echo "*** Default compile rules should not be used."
	522	+ $(CC) -S $(CFLAGS) $<
	523	+
	524	+%.o: %.cpp
	525	+ @echo "*** Default compile rules should not be used."
	526	+ $(CXX) -c $(CFLAGS) $<
	527	+
	528	+%.s: %.cpp
	529	+ @echo "*** Default compile rules should not be used."
	530	+ $(CXX) -S $(CFLAGS) $<
	531	+
	532	+%.o: %.S
	533	+ @echo "*** Default compile rules should not be used."
	534	+ $(CC) -c $(CFLAGS) $<

--- trunk/maketool/win/ADSP-BF533-proc.xml (nonexistent)

+++ trunk/maketool/win/ADSP-BF533-proc.xml (revision 46)

		@@ -0,0 +1,1743 @@
	1	+<?xml version="1.0" standalone="yes"?>
	2	+
	3	+<!-- ************************************************************************ -->
	4	+<!-- ******* ADSP-BF533-proc.xml -->
	5	+<!-- ******* Common definition file for registers, windows and memory -->
	6	+<!-- ******* Uppermost elements: -->
	7	+<!-- ******* <register-core-definitions> -->
	8	+<!-- ******* <register-extended-definitions> -->
	9	+<!-- ******* <register-reset-definitions> -->
	10	+<!-- ******* <format-definitions> -->
	11	+<!-- ******* <register-window-definitions> -->
	12	+<!-- ******* <memory-window-definitions> -->
	13	+<!-- ******* <memory-definitions> -->
	14	+<!-- ******* Copyright 2004-2008 Analog Devices, Inc. All rights reserved. -->
	15	+<!-- ************************************************************************ -->
	16	+
	17	+<visualdsp-proc-xml schema-version="1" name="ADSP-BF533-proc.xml">
	18	+
	19	+<version file-version="2.16"/>
	20	+
	21	+<!-- ************************************************************************ -->
	22	+<!-- ******* Register set -->
	23	+<!-- ************************************************************************ -->
	24	+
	25	+ <!-- *********************************************** -->
	26	+ <!-- Where to obtain the <register-core-definitions> -->
	27	+ <!-- *********************************************** -->
	28	+<register-core-file name="ADSP-EDN-core.xml" prefix="EDN"/>
	29	+
	30	+<register-extended-file name="ADSP-EDN-extended.xml"/>
	31	+
	32	+<!-- ************************************************************************ -->
	33	+<!-- ******* Grouping of formats that are applied to register windows -->
	34	+<!-- ************************************************************************ -->
	35	+
	36	+<format-definitions>
	37	+
	38	+<!-- All is every data format (numeric and character), but no disassembly -->
	39	+<format-grouping name="All">
	40	+ <format option="Hexadecimal"/>
	41	+ <format option="Binary"/>
	42	+ <format option="Octal"/>
	43	+ <format option="Signed Integer"/>
	44	+ <format option="Unsigned Integer"/>
	45	+ <format option="Floating Point 32 bit"/>
	46	+ <format option="Signed Fractional"/>
	47	+ <format option="Unsigned Fractional"/>
	48	+ <format option="Signed Integer 32 bit"/>
	49	+ <format option="Signed Integer 16 bit"/>
	50	+ <format option="Unsigned Integer 32 bit"/>
	51	+ <format option="Unsigned Integer 16 bit"/>
	52	+ <format option="Signed Fractional 32 bit"/>
	53	+ <format option="Signed Fractional 16 bit"/>
	54	+ <format option="Unsigned Fractional 32 bit"/>
	55	+ <format option="Unsigned Fractional 16 bit"/>
	56	+ <format option="Hex32"/>
	57	+ <format option="Hex16"/>
	58	+ <format option="Hex8"/>
	59	+ <format option="Binary 32 bit"/>
	60	+ <format option="Binary 16 bit"/>
	61	+ <format option="Binary 8 bit"/>
	62	+ <format option="Character"/>
	63	+</format-grouping>
	64	+</format-definitions>
	65	+
	66	+<!-- ************************************************************************ -->
	67	+<!-- ******* Register Windows -->
	68	+<!-- ************************************************************************ -->
	69	+
	70	+<register-window-definitions help-chm="\procfrio.chm::/html/">
	71	+<window name="System Configuration" menu="&Register:&Core:System Configuration" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x9" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_REG_SYSCFG.html">
	72	+ <register name="System Configuration Register" type="NODATA" x="0" y="0"/>
	73	+ <register name="SYSCFG" type="NODATA" x="0" y="1"/>
	74	+ <register name="SYSCFG" type="NOLABEL" x="8" y="1"/>
	75	+ <register name="SSSTEP Supervisor Single Step" type="NODATA" x="3" y="2"/>
	76	+ <register name="SSSTEP" type="NOLABEL" x="40" y="2"/>
	77	+ <register name="CCEN Cycle Counter Enable" type="NODATA" x="3" y="3"/>
	78	+ <register name="CCEN" type="NOLABEL" x="40" y="3"/>
	79	+ <register name="SNEN Self-Nesting Interrupt Enable" type="NODATA" x="3" y="4"/>
	80	+ <register name="SNEN" type="NOLABEL" x="40" y="4"/>
	81	+ <register name="Software Reset Register" type="NODATA" x="0" y="6"/>
	82	+ <register name="SWRST" type="NODATA" x="0" y="7"/>
	83	+ <register name="SWRST" type="NOLABEL" x="8" y="7"/>
	84	+ <register name="System Reset Configuration Register" type="NODATA" x="0" y="9"/>
	85	+ <register name="SYSCR" type="NODATA" x="0" y="10"/>
	86	+ <register name="SYSCR" type="NOLABEL" x="8" y="10"/>
	87	+</window>
	88	+<window name="Stack/Frame Pointers" menu="&Register:&Core:Stack/Frame Pointers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xA" help-tag="\BF533-HWR.chm::/EHR_05_data_addressing3.html">
	89	+ <register name="SP" type="NORMAL" x="5" y="0"/>
	90	+ <register name="USP" type="NORMAL" x="5" y="1"/>
	91	+ <register name="FP" type="NORMAL" x="5" y="2"/>
	92	+</window>
	93	+<window name="Sequencer" menu="&Register:&Core:Sequencer" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x7" help-tag="\BF533-HWR.chm::/EHR_04_program_sequencer2.html">
	94	+ <register name="RETS" type="NORMAL" x="5" y="0"/>
	95	+ <register name="RETI" type="NORMAL" x="5" y="1"/>
	96	+ <register name="RETX" type="NORMAL" x="5" y="2"/>
	97	+ <register name="RETE" type="NORMAL" x="5" y="3"/>
	98	+ <register name="RETN" type="NORMAL" x="5" y="4"/>
	99	+</window>
	100	+<window name="P Registers" menu="&Register:&Core:P Registers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xB" help-tag="\BF533-HWR.chm::/EHR_02_comp_units10.html">
	101	+ <register name="P0" type="NORMAL" x="5" y="0"/>
	102	+ <register name="P1" type="NORMAL" x="5" y="1"/>
	103	+ <register name="P2" type="NORMAL" x="5" y="2"/>
	104	+ <register name="P3" type="NORMAL" x="5" y="3"/>
	105	+ <register name="P4" type="NORMAL" x="5" y="4"/>
	106	+ <register name="P5" type="NORMAL" x="5" y="5"/>
	107	+</window>
	108	+<window name="Interrupt Controller" menu="&Register:&Core:Interrupt Controller" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x6" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_IMEM_CONTROL_REGISTER_LIST.html">
	109	+
	110	+ <register name="IPRIO" type="NORMAL" x="20" y="0"/>
	111	+
	112	+ <register name="0 = EMU" type="NODATA" x="1" y="5"/>
	113	+ <register name="1 = RST" type="NODATA" x="1" y="6"/>
	114	+ <register name="2 = NMI" type="NODATA" x="1" y="7"/>
	115	+ <register name="3 = EVX" type="NODATA" x="1" y="8"/>
	116	+ <register name="4 = GBLDIS" type="NODATA" x="1" y="9"/>
	117	+ <register name="5 = IVHW" type="NODATA" x="1" y="10"/>
	118	+ <register name="6 = IVTMR" type="NODATA" x="1" y="11"/>
	119	+ <register name="7 = IVG7" type="NODATA" x="1" y="12"/>
	120	+ <register name="8 = IVG8" type="NODATA" x="1" y="13"/>
	121	+ <register name="9 = IVG9" type="NODATA" x="1" y="14"/>
	122	+ <register name="10 = IVG10" type="NODATA" x="0" y="15"/>
	123	+ <register name="11 = IVG11" type="NODATA" x="0" y="16"/>
	124	+ <register name="12 = IVG12" type="NODATA" x="0" y="17"/>
	125	+ <register name="13 = IVG13" type="NODATA" x="0" y="18"/>
	126	+ <register name="14 = IVG14" type="NODATA" x="0" y="19"/>
	127	+ <register name="15 = IVG15" type="NODATA" x="0" y="20"/>
	128	+
	129	+ <register name="ILAT" type="NODATA" x="14" y="2"/>
	130	+ <register name="ILAT" type="NOLABEL" x="12" y="3"/>
	131	+ <register name="ILATbit0" type="NOLABEL" x="16" y="5"/>
	132	+ <register name="ILATbit1" type="NOLABEL" x="16" y="6"/>
	133	+ <register name="ILATbit2" type="NOLABEL" x="16" y="7"/>
	134	+ <register name="ILATbit3" type="NOLABEL" x="16" y="8"/>
	135	+ <register name="[unused]" type="NODATA" x="13" y="9"/>
	136	+ <register name="ILATbit5" type="NOLABEL" x="16" y="10"/>
	137	+ <register name="ILATbit6" type="NOLABEL" x="16" y="11"/>
	138	+ <register name="ILATbit7" type="NOLABEL" x="16" y="12"/>
	139	+ <register name="ILATbit8" type="NOLABEL" x="16" y="13"/>
	140	+ <register name="ILATbit9" type="NOLABEL" x="16" y="14"/>
	141	+ <register name="ILATbit10" type="NOLABEL" x="16" y="15"/>
	142	+ <register name="ILATbit11" type="NOLABEL" x="16" y="16"/>
	143	+ <register name="ILATbit12" type="NOLABEL" x="16" y="17"/>
	144	+ <register name="ILATbit13" type="NOLABEL" x="16" y="18"/>
	145	+ <register name="ILATbit14" type="NOLABEL" x="16" y="19"/>
	146	+ <register name="ILATbit15" type="NOLABEL" x="16" y="20"/>
	147	+
	148	+ <register name="IMASK" type="NODATA" x="24" y="2"/>
	149	+ <register name="IMASK" type="NOLABEL" x="23" y="3"/>
	150	+ <register name="IMASKbit0" type="NOLABEL" x="26" y="5"/>
	151	+ <register name="IMASKbit1" type="NOLABEL" x="26" y="6"/>
	152	+ <register name="IMASKbit2" type="NOLABEL" x="26" y="7"/>
	153	+ <register name="IMASKbit3" type="NOLABEL" x="26" y="8"/>
	154	+ <register name="IMASKbit4" type="NOLABEL" x="26" y="9"/>
	155	+ <register name="IMASKbit5" type="NOLABEL" x="26" y="10"/>
	156	+ <register name="IMASKbit6" type="NOLABEL" x="26" y="11"/>
	157	+ <register name="IMASKbit7" type="NOLABEL" x="26" y="12"/>
	158	+ <register name="IMASKbit8" type="NOLABEL" x="26" y="13"/>
	159	+ <register name="IMASKbit9" type="NOLABEL" x="26" y="14"/>
	160	+ <register name="IMASKbit10" type="NOLABEL" x="26" y="15"/>
	161	+ <register name="IMASKbit11" type="NOLABEL" x="26" y="16"/>
	162	+ <register name="IMASKbit12" type="NOLABEL" x="26" y="17"/>
	163	+ <register name="IMASKbit13" type="NOLABEL" x="26" y="18"/>
	164	+ <register name="IMASKbit14" type="NOLABEL" x="26" y="19"/>
	165	+ <register name="IMASKbit15" type="NOLABEL" x="26" y="20"/>
	166	+
	167	+ <register name="IPEND" type="NODATA" x="34" y="2"/>
	168	+ <register name="IPEND" type="NOLABEL" x="33" y="3"/>
	169	+ <register name="IPENDbit0" type="NOLABEL" x="36" y="5"/>
	170	+ <register name="IPENDbit1" type="NOLABEL" x="36" y="6"/>
	171	+ <register name="IPENDbit2" type="NOLABEL" x="36" y="7"/>
	172	+ <register name="IPENDbit3" type="NOLABEL" x="36" y="8"/>
	173	+ <register name="IPENDbit4" type="NOLABEL" x="36" y="9"/>
	174	+ <register name="IPENDbit5" type="NOLABEL" x="36" y="10"/>
	175	+ <register name="IPENDbit6" type="NOLABEL" x="36" y="11"/>
	176	+ <register name="IPENDbit7" type="NOLABEL" x="36" y="12"/>
	177	+ <register name="IPENDbit8" type="NOLABEL" x="36" y="13"/>
	178	+ <register name="IPENDbit9" type="NOLABEL" x="36" y="14"/>
	179	+ <register name="IPENDbit10" type="NOLABEL" x="36" y="15"/>
	180	+ <register name="IPENDbit11" type="NOLABEL" x="36" y="16"/>
	181	+ <register name="IPENDbit12" type="NOLABEL" x="36" y="17"/>
	182	+ <register name="IPENDbit13" type="NOLABEL" x="36" y="18"/>
	183	+ <register name="IPENDbit14" type="NOLABEL" x="36" y="19"/>
	184	+ <register name="IPENDbit15" type="NOLABEL" x="36" y="20"/>
	185	+</window>
	186	+<window name="Data Register File" menu="&Register:&Core:Data Register File" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xD" help-tag="\BF533-HWR.chm::/EHR_02_comp_units11.html">
	187	+ <register name="Whole" type="NODATA" x="5" y="0"/>
	188	+ <register name="High" type="NODATA" x="20" y="0"/>
	189	+ <register name="Low" type="NODATA" x="30" y="0"/>
	190	+ <register name="Byte" type="NODATA" x="40" y="0"/>
	191	+ <register name="R0" type="NORMAL" x="5" y="1"/>
	192	+ <register name="R1" type="NORMAL" x="5" y="2"/>
	193	+ <register name="R2" type="NORMAL" x="5" y="3"/>
	194	+ <register name="R3" type="NORMAL" x="5" y="4"/>
	195	+ <register name="R4" type="NORMAL" x="5" y="5"/>
	196	+ <register name="R5" type="NORMAL" x="5" y="6"/>
	197	+ <register name="R6" type="NORMAL" x="5" y="7"/>
	198	+ <register name="R7" type="NORMAL" x="5" y="8"/>
	199	+ <register name="R0.H" type="NOLABEL" x="20" y="1"/>
	200	+ <register name="R1.H" type="NOLABEL" x="20" y="2"/>
	201	+ <register name="R2.H" type="NOLABEL" x="20" y="3"/>
	202	+ <register name="R3.H" type="NOLABEL" x="20" y="4"/>
	203	+ <register name="R4.H" type="NOLABEL" x="20" y="5"/>
	204	+ <register name="R5.H" type="NOLABEL" x="20" y="6"/>
	205	+ <register name="R6.H" type="NOLABEL" x="20" y="7"/>
	206	+ <register name="R7.H" type="NOLABEL" x="20" y="8"/>
	207	+ <register name="R0.L" type="NOLABEL" x="30" y="1"/>
	208	+ <register name="R1.L" type="NOLABEL" x="30" y="2"/>
	209	+ <register name="R2.L" type="NOLABEL" x="30" y="3"/>
	210	+ <register name="R3.L" type="NOLABEL" x="30" y="4"/>
	211	+ <register name="R4.L" type="NOLABEL" x="30" y="5"/>
	212	+ <register name="R5.L" type="NOLABEL" x="30" y="6"/>
	213	+ <register name="R6.L" type="NOLABEL" x="30" y="7"/>
	214	+ <register name="R7.L" type="NOLABEL" x="30" y="8"/>
	215	+ <register name="R0.B" type="NOLABEL" x="40" y="1"/>
	216	+ <register name="R1.B" type="NOLABEL" x="40" y="2"/>
	217	+ <register name="R2.B" type="NOLABEL" x="40" y="3"/>
	218	+ <register name="R3.B" type="NOLABEL" x="40" y="4"/>
	219	+ <register name="R4.B" type="NOLABEL" x="40" y="5"/>
	220	+ <register name="R5.B" type="NOLABEL" x="40" y="6"/>
	221	+ <register name="R6.B" type="NOLABEL" x="40" y="7"/>
	222	+ <register name="R7.B" type="NOLABEL" x="40" y="8"/>
	223	+</window>
	224	+<window name="DAG Registers" menu="&Register:&Core:DAG Registers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xC" help-tag="\BF533-HWR.chm::/EHR_02_comp_units11.html">
	225	+ <register name="I Regs" type="NODATA" x="5" y="0"/>
	226	+ <register name="M Regs" type="NODATA" x="17" y="0"/>
	227	+ <register name="L Regs" type="NODATA" x="29" y="0"/>
	228	+ <register name="B Regs" type="NODATA" x="41" y="0"/>
	229	+ <register name="I0" type="NORMAL" x="5" y="1"/>
	230	+ <register name="I1" type="NORMAL" x="5" y="2"/>
	231	+ <register name="I2" type="NORMAL" x="5" y="3"/>
	232	+ <register name="I3" type="NORMAL" x="5" y="4"/>
	233	+ <register name="M0" type="NORMAL" x="17" y="1"/>
	234	+ <register name="M1" type="NORMAL" x="17" y="2"/>
	235	+ <register name="M2" type="NORMAL" x="17" y="3"/>
	236	+ <register name="M3" type="NORMAL" x="17" y="4"/>
	237	+ <register name="L0" type="NORMAL" x="29" y="1"/>
	238	+ <register name="L1" type="NORMAL" x="29" y="2"/>
	239	+ <register name="L2" type="NORMAL" x="29" y="3"/>
	240	+ <register name="L3" type="NORMAL" x="29" y="4"/>
	241	+ <register name="B0" type="NORMAL" x="41" y="1"/>
	242	+ <register name="B1" type="NORMAL" x="41" y="2"/>
	243	+ <register name="B2" type="NORMAL" x="41" y="3"/>
	244	+ <register name="B3" type="NORMAL" x="41" y="4"/>
	245	+</window>
	246	+<window name="Accumulators" menu="&Register:&Core:Accumulators" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x18" help-tag="HID_Accumulators.htm">
	247	+ <register name="A0" type="NORMAL" x="5" y="0"/>
	248	+ <register name="A0.W" type="NORMAL" x="5" y="1"/>
	249	+ <register name="A0.X" type="NORMAL" x="5" y="2"/>
	250	+ <register name="A0.L" type="NORMAL" x="5" y="3"/>
	251	+ <register name="A0.H" type="NORMAL" x="5" y="4"/>
	252	+ <register name="A1" type="NORMAL" x="25" y="0"/>
	253	+ <register name="A1.W" type="NORMAL" x="25" y="1"/>
	254	+ <register name="A1.X" type="NORMAL" x="25" y="2"/>
	255	+ <register name="A1.L" type="NORMAL" x="25" y="3"/>
	256	+ <register name="A1.H" type="NORMAL" x="25" y="4"/>
	257	+</window>
	258	+<window name="Loop Counters" menu="&Register:&Core:Loop Counters" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x13" help-tag="\BF533-HWR.chm::/EHR_04_program_sequencer4.html">
	259	+ <register name="LC0" type="NORMAL" x="5" y="0"/>
	260	+ <register name="LT0" type="NORMAL" x="5" y="1"/>
	261	+ <register name="LB0" type="NORMAL" x="5" y="2"/>
	262	+ <register name="LC1" type="NORMAL" x="5" y="4"/>
	263	+ <register name="LT1" type="NORMAL" x="5" y="5"/>
	264	+ <register name="LB1" type="NORMAL" x="5" y="6"/>
	265	+</window>
	266	+<window name="Cycles" menu="&Register:&Core:Cycles" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x12" help-tag="HID_Cycles_Window.htm">
	267	+ <register name="CYCLES" type="NORMAL" x="8" y="0"/>
	268	+ <register name="CYCLES2" type="NORMAL" x="8" y="1"/>
	269	+</window>
	270	+<window name="PC Counters" menu="&Register:&Core:PC Counters" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x19" help-tag="HID_PC_Window.htm">
	271	+ <register name="PC" type="NORMAL" x="8" y="0"/>
	272	+</window>
	273	+<window name="Core Timer Register File" menu="&Register:&Core:Core Timer Register File" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x8" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_CORE_TIMER_REGISTER_LIST.html">
	274	+ <register name="TCNTL" type="NORMAL" x="9" y="0"/>
	275	+ <register name="TINT" type="NORMAL" x="15" y="1"/>
	276	+ <register name="TAUTORLD" type="NORMAL" x="27" y="1"/>
	277	+ <register name="TMREN" type="NORMAL" x="35" y="1"/>
	278	+ <register name="TMPWR" type="NORMAL" x="43" y="1"/>
	279	+ <register name="TPERIOD" type="NORMAL" x="9" y="3"/>
	280	+ <register name="TSCALE" type="NORMAL" x="9" y="4"/>
	281	+ <register name="TCOUNT" type="NORMAL" x="9" y="5"/>
	282	+</window>
	283	+<window name="L1 Data Memory Registers" menu="&Register:&Core:L1 Data Memory Registers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x1B" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMEM_CONTROL_REGISTER_LIST.html">
	284	+ <register name="SRAM_BASE_ADDR" type="NODATA" x="0" y="0"/>
	285	+ <register name="SRAM_BASE_ADDR" type="NOLABEL" x="18" y="0"/>
	286	+ <register name="DMEM_CONTROL" type="NODATA" x="0" y="2"/>
	287	+ <register name="DMEM_CONTROL" type="NOLABEL" x="18" y="2"/>
	288	+ <register name="PORT_PREF1" type="NODATA" x="2" y="3"/>
	289	+ <register name="PORT_PREF1" type="NOLABEL" x="20" y="3"/>
	290	+ <register name="PORT_PREF0" type="NODATA" x="2" y="4"/>
	291	+ <register name="PORT_PREF0" type="NOLABEL" x="20" y="4"/>
	292	+ <register name="DCBS" type="NODATA" x="2" y="5"/>
	293	+ <register name="DCBS" type="NOLABEL" x="20" y="5"/>
	294	+ <register name="DMC" type="NODATA" x="2" y="6"/>
	295	+ <register name="DMC" type="NOLABEL" x="20" y="6"/>
	296	+ <register name="ENDCPLB" type="NODATA" x="2" y="7"/>
	297	+ <register name="ENDCPLB" type="NOLABEL" x="20" y="7"/>
	298	+ <register name="ENDM" type="NODATA" x="2" y="8"/>
	299	+ <register name="ENDM" type="NOLABEL" x="20" y="8"/>
	300	+ <register name="DCPLB_STATUS" type="NODATA" x="0" y="10"/>
	301	+ <register name="DATA_FAULT_STATUS" type="NOLABEL" x="18" y="10"/>
	302	+ <register name="FAULT_ILLADDR" type="NODATA" x="2" y="11"/>
	303	+ <register name="DATA_FAULT_ILLADDR" type="NOLABEL" x="20" y="11"/>
	304	+ <register name="FAULT_DAG" type="NODATA" x="2" y="12"/>
	305	+ <register name="FAULT_DAG" type="NOLABEL" x="20" y="12"/>
	306	+ <register name="FAULT_USERSUPV" type="NODATA" x="2" y="13"/>
	307	+ <register name="DATA_FAULT_USERSUPV" type="NOLABEL" x="20" y="13"/>
	308	+ <register name="FAULT_READWRITE" type="NODATA" x="2" y="14"/>
	309	+ <register name="FAULT_READWRITE" type="NOLABEL" x="20" y="14"/>
	310	+ <register name="DATA_FAULT" type="NODATA" x="2" y="15"/>
	311	+ <register name="DATA_FAULT" type="NOLABEL" x="20" y="15"/>
	312	+ <register name="DCPLB_FAULT_ADDR" type="NODATA" x="0" y="17"/>
	313	+ <register name="DATA_FAULT_ADDR" type="NOLABEL" x="18" y="17"/>
	314	+ <register name="DCPLB_ADDR0" type="NORMAL" x="18" y="19"/>
	315	+ <register name="DCPLB_ADDR1" type="NORMAL" x="18" y="20"/>
	316	+ <register name="DCPLB_ADDR2" type="NORMAL" x="18" y="21"/>
	317	+ <register name="DCPLB_ADDR3" type="NORMAL" x="18" y="22"/>
	318	+ <register name="DCPLB_ADDR4" type="NORMAL" x="18" y="23"/>
	319	+ <register name="DCPLB_ADDR5" type="NORMAL" x="18" y="24"/>
	320	+ <register name="DCPLB_ADDR6" type="NORMAL" x="18" y="25"/>
	321	+ <register name="DCPLB_ADDR7" type="NORMAL" x="18" y="26"/>
	322	+ <register name="DCPLB_ADDR8" type="NORMAL" x="18" y="27"/>
	323	+ <register name="DCPLB_ADDR9" type="NORMAL" x="18" y="28"/>
	324	+ <register name="DCPLB_ADDR10" type="NORMAL" x="18" y="29"/>
	325	+ <register name="DCPLB_ADDR11" type="NORMAL" x="18" y="30"/>
	326	+ <register name="DCPLB_ADDR12" type="NORMAL" x="18" y="31"/>
	327	+ <register name="DCPLB_ADDR13" type="NORMAL" x="18" y="32"/>
	328	+ <register name="DCPLB_ADDR14" type="NORMAL" x="18" y="33"/>
	329	+ <register name="DCPLB_ADDR15" type="NORMAL" x="18" y="34"/>
	330	+ <register name="DCPLB_DATA0" type="NORMAL" x="42" y="19"/>
	331	+ <register name="DCPLB_DATA1" type="NORMAL" x="42" y="20"/>
	332	+ <register name="DCPLB_DATA2" type="NORMAL" x="42" y="21"/>
	333	+ <register name="DCPLB_DATA3" type="NORMAL" x="42" y="22"/>
	334	+ <register name="DCPLB_DATA4" type="NORMAL" x="42" y="23"/>
	335	+ <register name="DCPLB_DATA5" type="NORMAL" x="42" y="24"/>
	336	+ <register name="DCPLB_DATA6" type="NORMAL" x="42" y="25"/>
	337	+ <register name="DCPLB_DATA7" type="NORMAL" x="42" y="26"/>
	338	+ <register name="DCPLB_DATA8" type="NORMAL" x="42" y="27"/>
	339	+ <register name="DCPLB_DATA9" type="NORMAL" x="42" y="28"/>
	340	+ <register name="DCPLB_DATA10" type="NORMAL" x="42" y="29"/>
	341	+ <register name="DCPLB_DATA11" type="NORMAL" x="42" y="30"/>
	342	+ <register name="DCPLB_DATA12" type="NORMAL" x="42" y="31"/>
	343	+ <register name="DCPLB_DATA13" type="NORMAL" x="42" y="32"/>
	344	+ <register name="DCPLB_DATA14" type="NORMAL" x="42" y="33"/>
	345	+ <register name="DCPLB_DATA15" type="NORMAL" x="42" y="34"/>
	346	+ <register name="DTEST_COMMAND" type="NODATA" x="0" y="36"/>
	347	+ <register name="DTEST_COMMAND" type="NOLABEL" x="18" y="36"/>
	348	+ <register name="DTEST_DATA0" type="NODATA" x="0" y="37"/>
	349	+ <register name="DTEST_DATA0" type="NOLABEL" x="18" y="37"/>
	350	+ <register name="DTEST_DATA1" type="NODATA" x="0" y="38"/>
	351	+ <register name="DTEST_DATA1" type="NOLABEL" x="18" y="38"/>
	352	+</window>
	353	+<window name="L1 Code Memory Registers" menu="&Register:&Core:L1 Code Memory Registers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0x1C" help-tag="\BF533-HWR.chm::/EHR_A_core_MMR_assignments3.html">
	354	+ <register name="IMEM_CONTROL" type="NODATA" x="0" y="0"/>
	355	+ <register name="IMEM_CONTROL" type="NOLABEL" x="18" y="0"/>
	356	+ <register name="LRUPRIORST" type="NODATA" x="2" y="1"/>
	357	+ <register name="LRUPRIORST" type="NOLABEL" x="18" y="1"/>
	358	+ <register name="ILOC" type="NODATA" x="2" y="2"/>
	359	+ <register name="ILOC" type="NOLABEL" x="20" y="2"/>
	360	+ <register name="IMC" type="NODATA" x="2" y="3"/>
	361	+ <register name="IMC" type="NOLABEL" x="20" y="3"/>
	362	+ <register name="ENICPLB" type="NODATA" x="2" y="4"/>
	363	+ <register name="ENICPLB" type="NOLABEL" x="20" y="4"/>
	364	+ <register name="ICPLB_STATUS" type="NODATA" x="0" y="7"/>
	365	+ <register name="CODE_FAULT_STATUS" type="NOLABEL" x="18" y="7"/>
	366	+ <register name="FAULT_ILLADDR" type="NODATA" x="2" y="8"/>
	367	+ <register name="CODE_FAULT_ILLADDR" type="NOLABEL" x="20" y="8"/>
	368	+ <register name="FAULT_USERSUPV" type="NODATA" x="2" y="9"/>
	369	+ <register name="CODE_FAULT_USERSUPV" type="NOLABEL" x="20" y="9"/>
	370	+ <register name="FAULT" type="NODATA" x="2" y="10"/>
	371	+ <register name="CODE_FAULT" type="NOLABEL" x="20" y="10"/>
	372	+ <register name="ICPLB_FAULT_ADDR" type="NODATA" x="0" y="12"/>
	373	+ <register name="CODE_FAULT_ADDR" type="NOLABEL" x="18" y="12"/>
	374	+ <register name="ICPLB_ADDR0" type="NORMAL" x="18" y="14"/>
	375	+ <register name="ICPLB_ADDR1" type="NORMAL" x="18" y="15"/>
	376	+ <register name="ICPLB_ADDR2" type="NORMAL" x="18" y="16"/>
	377	+ <register name="ICPLB_ADDR3" type="NORMAL" x="18" y="17"/>
	378	+ <register name="ICPLB_ADDR4" type="NORMAL" x="18" y="18"/>
	379	+ <register name="ICPLB_ADDR5" type="NORMAL" x="18" y="19"/>
	380	+ <register name="ICPLB_ADDR6" type="NORMAL" x="18" y="20"/>
	381	+ <register name="ICPLB_ADDR7" type="NORMAL" x="18" y="21"/>
	382	+ <register name="ICPLB_ADDR8" type="NORMAL" x="18" y="22"/>
	383	+ <register name="ICPLB_ADDR9" type="NORMAL" x="18" y="23"/>
	384	+ <register name="ICPLB_ADDR10" type="NORMAL" x="18" y="24"/>
	385	+ <register name="ICPLB_ADDR11" type="NORMAL" x="18" y="25"/>
	386	+ <register name="ICPLB_ADDR12" type="NORMAL" x="18" y="26"/>
	387	+ <register name="ICPLB_ADDR13" type="NORMAL" x="18" y="27"/>
	388	+ <register name="ICPLB_ADDR14" type="NORMAL" x="18" y="28"/>
	389	+ <register name="ICPLB_ADDR15" type="NORMAL" x="18" y="29"/>
	390	+ <register name="ICPLB_DATA0" type="NORMAL" x="42" y="14"/>
	391	+ <register name="ICPLB_DATA1" type="NORMAL" x="42" y="15"/>
	392	+ <register name="ICPLB_DATA2" type="NORMAL" x="42" y="16"/>
	393	+ <register name="ICPLB_DATA3" type="NORMAL" x="42" y="17"/>
	394	+ <register name="ICPLB_DATA4" type="NORMAL" x="42" y="18"/>
	395	+ <register name="ICPLB_DATA5" type="NORMAL" x="42" y="19"/>
	396	+ <register name="ICPLB_DATA6" type="NORMAL" x="42" y="20"/>
	397	+ <register name="ICPLB_DATA7" type="NORMAL" x="42" y="21"/>
	398	+ <register name="ICPLB_DATA8" type="NORMAL" x="42" y="22"/>
	399	+ <register name="ICPLB_DATA9" type="NORMAL" x="42" y="23"/>
	400	+ <register name="ICPLB_DATA10" type="NORMAL" x="42" y="24"/>
	401	+ <register name="ICPLB_DATA11" type="NORMAL" x="42" y="25"/>
	402	+ <register name="ICPLB_DATA12" type="NORMAL" x="42" y="26"/>
	403	+ <register name="ICPLB_DATA13" type="NORMAL" x="42" y="27"/>
	404	+ <register name="ICPLB_DATA14" type="NORMAL" x="42" y="28"/>
	405	+ <register name="ICPLB_DATA15" type="NORMAL" x="42" y="29"/>
	406	+ <register name="ITEST_COMMAND" type="NODATA" x="0" y="31"/>
	407	+ <register name="ITEST_COMMAND" type="NOLABEL" x="18" y="31"/>
	408	+ <register name="ITEST_DATA0" type="NODATA" x="0" y="32"/>
	409	+ <register name="ITEST_DATA0" type="NOLABEL" x="18" y="32"/>
	410	+ <register name="ITEST_DATA1" type="NODATA" x="0" y="33"/>
	411	+ <register name="ITEST_DATA1" type="NOLABEL" x="18" y="33"/>
	412	+</window>
	413	+<window name="Event Vector Registers" menu="&Register:&Core:Event Vector Registers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0x1D" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_IMEM_CONTROL_REGISTER_LIST.html">
	414	+ <register name="EVT0" type="NORMAL" x="7" y="1"/>
	415	+ <register name="EVT1" type="NORMAL" x="7" y="2"/>
	416	+ <register name="EVT2" type="NORMAL" x="7" y="3"/>
	417	+ <register name="EVT3" type="NORMAL" x="7" y="4"/>
	418	+ <register name="EVT4" type="NORMAL" x="7" y="5"/>
	419	+ <register name="EVT5" type="NORMAL" x="7" y="6"/>
	420	+ <register name="EVT6" type="NORMAL" x="7" y="7"/>
	421	+ <register name="EVT7" type="NORMAL" x="7" y="8"/>
	422	+ <register name="EVT8" type="NORMAL" x="7" y="9"/>
	423	+ <register name="EVT9" type="NORMAL" x="7" y="10"/>
	424	+ <register name="EVT10" type="NORMAL" x="7" y="11"/>
	425	+ <register name="EVT11" type="NORMAL" x="7" y="12"/>
	426	+ <register name="EVT12" type="NORMAL" x="7" y="13"/>
	427	+ <register name="EVT13" type="NORMAL" x="7" y="14"/>
	428	+ <register name="EVT14" type="NORMAL" x="7" y="15"/>
	429	+ <register name="EVT15" type="NORMAL" x="7" y="16"/>
	430	+</window>
	431	+<window name="Sequencer Status" menu="&Register:&Core:Status:Sequencer Status" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xF" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_REG_SEQSTAT.html">
	432	+ <register name="SEQSTAT" type="NORMAL" x="8" y="0"/>
	433	+ <register name="EXCAUSE" type="NORMAL" x="10" y="2"/>
	434	+ <!--register name="OMODE" type="NORMAL" x="10" y="3"/-->
	435	+ <register name="IDLE_REQ" type="NORMAL" x="10" y="3"/>
	436	+ <register name="SFTRESET" type="NORMAL" x="10" y="4"/>
	437	+ <register name="HWERRCAUSE" type="NORMAL" x="10" y="5"/>
	438	+</window>
	439	+<window name="Arithmetic Status" menu="&Register:&Core:Status:Arithmetic Status" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD039" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_REG_ASTAT.html">
	440	+ <register name="ASTAT" type="NORMAL" x="5" y="1"/>
	441	+ <register name="AZ" type="NORMAL" x="7" y="2"/>
	442	+ <register name="AN" type="NORMAL" x="7" y="3"/>
	443	+ <register name="CC" type="NORMAL" x="7" y="4"/>
	444	+ <register name="AQ" type="NORMAL" x="7" y="5"/>
	445	+ <register name="RND_MOD" type="NORMAL" x="7" y="6"/>
	446	+ <register name="AC0" type="NORMAL" x="7" y="7"/>
	447	+ <register name="AC1" type="NORMAL" x="7" y="8"/>
	448	+ <register name="AV0" type="NORMAL" x="20" y="2"/>
	449	+ <register name="AV0S" type="NORMAL" x="20" y="3"/>
	450	+ <register name="AV1" type="NORMAL" x="20" y="4"/>
	451	+ <register name="AV1S" type="NORMAL" x="20" y="5"/>
	452	+ <register name="V" type="NORMAL" x="20" y="6"/>
	453	+ <register name="VS" type="NORMAL" x="20" y="7"/>
	454	+</window>
	455	+<window name="Phase Locked Loop" menu="&Register:&Core:PLL Register File" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD03A" help-tag="\BF533-HWR.chm::/EHR_08_dynamic_power_mgmt7.html">
	456	+ <register name="PLL_CTL" type="NORMAL" x="11" y="0"/>
	457	+ <register name="PLL_DIV" type="NORMAL" x="11" y="1"/>
	458	+ <register name="VR_CTL" type="NORMAL" x="11" y="2"/>
	459	+ <register name="PLL_STAT" type="NORMAL" x="11" y="3"/>
	460	+ <register name="PLL_LOCKCNT" type="NORMAL" x="11" y="4"/>
	461	+</window>
	462	+<window name="SPT1" menu="&Register:&Peripherals:SPT1" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD038" help-tag="\procfrio.chm::/html/hid_peripheral_sp1532.htm">
	463	+ <register name="STATUS" type="NODATA" x="10" y="1"/>
	464	+ <register name="- SETUP -" type="NODATA" x="12" y="3"/>
	465	+ <register name="Receive" type="NODATA" x="14" y="4"/>
	466	+ <register name="Transmit" type="NODATA" x="24" y="4"/>
	467	+ <register name="CONFIG1" type="NODATA" x="0" y="5"/>
	468	+ <register name="CONFIG2" type="NODATA" x="0" y="6"/>
	469	+ <register name="SCLKDIV" type="NODATA" x="0" y="7"/>
	470	+ <register name="FSDIV" type="NODATA" x="0" y="8"/>
	471	+ <register name="- PARALLEL REGS -" type="NODATA" x="8" y="11"/>
	472	+ <register name="RX/TX" type="NODATA" x="0" y="12"/>
	473	+ <register name="- MCM -" type="NODATA" x="13" y="14"/>
	474	+ <register name="Receive" type="NODATA" x="14" y="15"/>
	475	+ <register name="Transmit" type="NODATA" x="24" y="15"/>
	476	+ <register name="CS0" type="NODATA" x="0" y="16"/>
	477	+ <register name="CS1" type="NODATA" x="0" y="17"/>
	478	+ <register name="CS2" type="NODATA" x="0" y="18"/>
	479	+ <register name="CS3" type="NODATA" x="0" y="19"/>
	480	+ <register name="- MCM CONFIG -" type="NODATA" x="9" y="21"/>
	481	+ <register name="MCMC1/MCMC2" type="NODATA" x="0" y="22"/>
	482	+ <register name="Current Channel" type="NODATA" x="0" y="24"/>
	483	+ <register name="SPT1_STAT" type="NOLABEL" x="18" y="1"/>
	484	+ <register name="SPT1_RX_CONFIG0" type="NOLABEL" x="14" y="5"/>
	485	+ <register name="SPT1_RX_CONFIG1" type="NOLABEL" x="14" y="6"/>
	486	+ <register name="SPT1_TX_CONFIG0" type="NOLABEL" x="24" y="5"/>
	487	+ <register name="SPT1_TX_CONFIG1" type="NOLABEL" x="24" y="6"/>
	488	+ <register name="SPT1_RSCLKDIV" type="NOLABEL" x="14" y="7"/>
	489	+ <register name="SPT1_TSCLKDIV" type="NOLABEL" x="24" y="7"/>
	490	+ <register name="SPT1_RFSDIV" type="NOLABEL" x="14" y="8"/>
	491	+ <register name="SPT1_TFSDIV" type="NOLABEL" x="24" y="8"/>
	492	+ <register name="SPT1_RX" type="NOLABEL" x="14" y="12"/>
	493	+ <register name="SPT1_TX" type="NOLABEL" x="24" y="12"/>
	494	+ <register name="SPT1_MRCS0" type="NOLABEL" x="14" y="16"/>
	495	+ <register name="SPT1_MRCS1" type="NOLABEL" x="14" y="17"/>
	496	+ <register name="SPT1_MRCS2" type="NOLABEL" x="14" y="18"/>
	497	+ <register name="SPT1_MRCS3" type="NOLABEL" x="14" y="19"/>
	498	+ <register name="SPT1_MTCS0" type="NOLABEL" x="24" y="16"/>
	499	+ <register name="SPT1_MTCS1" type="NOLABEL" x="24" y="17"/>
	500	+ <register name="SPT1_MTCS2" type="NOLABEL" x="24" y="18"/>
	501	+ <register name="SPT1_MTCS3" type="NOLABEL" x="24" y="19"/>
	502	+ <register name="SPT1_MCMC1" type="NOLABEL" x="16" y="22"/>
	503	+ <register name="SPT1_MCMC2" type="NOLABEL" x="22" y="22"/>
	504	+ <register name="SPT1_CHNL" type="NOLABEL" x="22" y="24"/>
	505	+</window>
	506	+<window name="SPT0" menu="&Register:&Peripherals:SPT0" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD037" help-tag="\procfrio.chm::/html/hid_peripheral_sp1532.htm">
	507	+ <register name="STATUS" type="NODATA" x="10" y="1"/>
	508	+ <register name="- SETUP -" type="NODATA" x="12" y="3"/>
	509	+ <register name="Receive" type="NODATA" x="14" y="4"/>
	510	+ <register name="Transmit" type="NODATA" x="24" y="4"/>
	511	+ <register name="CONFIG1" type="NODATA" x="0" y="5"/>
	512	+ <register name="CONFIG2" type="NODATA" x="0" y="6"/>
	513	+ <register name="SCLKDIV" type="NODATA" x="0" y="7"/>
	514	+ <register name="FSDIV" type="NODATA" x="0" y="8"/>
	515	+ <register name="- PARALLEL REGS -" type="NODATA" x="8" y="11"/>
	516	+ <register name="RX/TX" type="NODATA" x="0" y="12"/>
	517	+ <register name="- MCM -" type="NODATA" x="13" y="14"/>
	518	+ <register name="Receive" type="NODATA" x="14" y="15"/>
	519	+ <register name="Transmit" type="NODATA" x="24" y="15"/>
	520	+ <register name="CS0" type="NODATA" x="0" y="16"/>
	521	+ <register name="CS1" type="NODATA" x="0" y="17"/>
	522	+ <register name="CS2" type="NODATA" x="0" y="18"/>
	523	+ <register name="CS3" type="NODATA" x="0" y="19"/>
	524	+ <register name="- MCM CONFIG -" type="NODATA" x="9" y="21"/>
	525	+ <register name="MCMC1/MCMC2" type="NODATA" x="0" y="22"/>
	526	+ <register name="Current Channel" type="NODATA" x="0" y="24"/>
	527	+ <register name="SPT0_STAT" type="NOLABEL" x="18" y="1"/>
	528	+ <register name="SPT0_RX_CONFIG0" type="NOLABEL" x="14" y="5"/>
	529	+ <register name="SPT0_RX_CONFIG1" type="NOLABEL" x="14" y="6"/>
	530	+ <register name="SPT0_TX_CONFIG0" type="NOLABEL" x="24" y="5"/>
	531	+ <register name="SPT0_TX_CONFIG1" type="NOLABEL" x="24" y="6"/>
	532	+ <register name="SPT0_RSCLKDIV" type="NOLABEL" x="14" y="7"/>
	533	+ <register name="SPT0_TSCLKDIV" type="NOLABEL" x="24" y="7"/>
	534	+ <register name="SPT0_RFSDIV" type="NOLABEL" x="14" y="8"/>
	535	+ <register name="SPT0_TFSDIV" type="NOLABEL" x="24" y="8"/>
	536	+ <register name="SPT0_RX" type="NOLABEL" x="14" y="12"/>
	537	+ <register name="SPT0_TX" type="NOLABEL" x="24" y="12"/>
	538	+ <register name="SPT0_MRCS0" type="NOLABEL" x="14" y="16"/>
	539	+ <register name="SPT0_MRCS1" type="NOLABEL" x="14" y="17"/>
	540	+ <register name="SPT0_MRCS2" type="NOLABEL" x="14" y="18"/>
	541	+ <register name="SPT0_MRCS3" type="NOLABEL" x="14" y="19"/>
	542	+ <register name="SPT0_MTCS0" type="NOLABEL" x="24" y="16"/>
	543	+ <register name="SPT0_MTCS1" type="NOLABEL" x="24" y="17"/>
	544	+ <register name="SPT0_MTCS2" type="NOLABEL" x="24" y="18"/>
	545	+ <register name="SPT0_MTCS3" type="NOLABEL" x="24" y="19"/>
	546	+ <register name="SPT0_MCMC1" type="NOLABEL" x="16" y="22"/>
	547	+ <register name="SPT0_MCMC2" type="NOLABEL" x="22" y="22"/>
	548	+ <register name="SPT0_CHNL" type="NOLABEL" x="22" y="24"/>
	549	+</window>
	550	+<window name="PPI Registers" menu="&Register:&Peripherals:PPI" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD035" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_PPI_REGISTER_LIST.html">
	551	+ <register name="CONTROL" type="NODATA" x="0" y="0"/>
	552	+ <register name="PORT_EN" type="NORMAL" x="10" y="1"/>
	553	+ <register name="PORT_DIR" type="NORMAL" x="10" y="2"/>
	554	+ <register name="XFR_TYPE" type="NORMAL" x="10" y="3"/>
	555	+ <register name="PORT_CFG" type="NORMAL" x="10" y="4"/>
	556	+ <register name="FLD_SEL" type="NORMAL" x="10" y="5"/>
	557	+ <register name="PACK_EN" type="NORMAL" x="10" y="6"/>
	558	+ <register name="DMA32" type="NORMAL" x="10" y="7"/>
	559	+ <register name="SKIP_EN" type="NORMAL" x="10" y="8"/>
	560	+ <register name="SKIP_EO" type="NORMAL" x="10" y="9"/>
	561	+ <register name="DLEN" type="NORMAL" x="10" y="10"/>
	562	+ <register name="POL" type="NORMAL" x="10" y="11"/>
	563	+ <register name="STATUS" type="NODATA" x="0" y="13"/>
	564	+ <register name="FLD" type="NORMAL" x="10" y="14"/>
	565	+ <register name="FT_ERR" type="NORMAL" x="10" y="15"/>
	566	+ <register name="OVR" type="NORMAL" x="10" y="16"/>
	567	+ <register name="UNDR" type="NORMAL" x="10" y="17"/>
	568	+ <register name="ERR_DET" type="NORMAL" x="10" y="18"/>
	569	+ <register name="ERR_NCOR" type="NORMAL" x="10" y="19"/>
	570	+ <register name="DELAY" type="NODATA" x="0" y="21"/>
	571	+ <register name="COUNT" type="NODATA" x="0" y="22"/>
	572	+ <register name="FRAME" type="NODATA" x="0" y="23"/>
	573	+ <register name="PPI_CONTROL" type="NOLABEL" x="9" y="0"/>
	574	+ <register name="PPI_STATUS" type="NOLABEL" x="9" y="13"/>
	575	+ <register name="PPI_DELAY" type="NOLABEL" x="9" y="21"/>
	576	+ <register name="PPI_COUNT" type="NOLABEL" x="9" y="22"/>
	577	+ <register name="PPI_FRAME" type="NOLABEL" x="9" y="23"/>
	578	+</window>
	579	+<window name="UART Registers" menu="&Register:&Peripherals:UART" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD036" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_UART_CONTROLLER_REGISTER_LIST.html">
	580	+ <register name="DLL Divisor Latch Low Byte" type="NODATA" x="0" y="0"/>
	581	+ <register name="UART_DLL" type="NOLABEL" x="32" y="0"/>
	582	+ <register name="DLH Divisor Latch High Byte" type="NODATA" x="0" y="1"/>
	583	+ <register name="UART_DLH" type="NOLABEL" x="32" y="1"/>
	584	+ <register name="IER Interrupt Enable" type="NODATA" x="0" y="2"/>
	585	+ <register name="UART_IER" type="NOLABEL" x="32" y="2"/>
	586	+ <register name="IIR Interrupt Identification" type="NODATA" x="0" y="3"/>
	587	+ <register name="UART_IIR" type="NOLABEL" x="32" y="3"/>
	588	+ <register name="LCR Line Control" type="NODATA" x="0" y="4"/>
	589	+ <register name="UART_LCR" type="NOLABEL" x="32" y="4"/>
	590	+ <register name="MCR Modem Control" type="NODATA" x="0" y="5"/>
	591	+ <register name="UART_MCR" type="NOLABEL" x="32" y="5"/>
	592	+ <register name="LSR Line Status" type="NODATA" x="0" y="6"/>
	593	+ <register name="UART_LSR" type="NOLABEL" x="32" y="6"/>
	594	+ <register name="SCR Scratch Register" type="NODATA" x="0" y="7"/>
	595	+ <register name="UART_SCR" type="NOLABEL" x="32" y="7"/>
	596	+ <register name="THR Transmit Holding" type="NODATA" x="0" y="8"/>
	597	+ <register name="UART_THR" type="NOLABEL" x="32" y="8"/>
	598	+ <register name="GCTL Global Control " type="NODATA" x="0" y="9"/>
	599	+ <register name="UART_GCTL" type="NOLABEL" x="32" y="9"/>
	600	+ <register name="RBR Receive Buffer" type="NODATA" x="0" y="10"/>
	601	+ <register name="UART_RBR" type="NOLABEL" x="32" y="10"/>
	602	+</window>
	603	+<window name="Timer Registers" menu="&Register:&Peripherals:Timers" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD033" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_TIMER_REGISTER_LIST.html">
	604	+ <register name="TIMER_ENABLE" type="NODATA" x="0" y="0"/>
	605	+ <register name="TIMER_ENABLE" type="NOLABEL" x="14" y="0"/>
	606	+ <register name="TIMER_DISABLE" type="NODATA" x="0" y="1"/>
	607	+ <register name="TIMER_DISABLE" type="NOLABEL" x="14" y="1"/>
	608	+ <register name="TIMER_STATUS" type="NODATA" x="0" y="2"/>
	609	+ <register name="TIMER_STATUS" type="NOLABEL" x="14" y="2"/>
	610	+
	611	+ <register name="CONFIG" type="NODATA" x="10" y="4"/>
	612	+ <register name="COUNTER" type="NODATA" x="18" y="4"/>
	613	+ <register name="PERIOD" type="NODATA" x="29" y="4"/>
	614	+ <register name="WIDTH" type="NODATA" x="40" y="4"/>
	615	+
	616	+ <register name="TIMER 0" type="NODATA" x="0" y="5"/>
	617	+ <register name="TIMER0_CONFIG" type="NOLABEL" x="10" y="5"/>
	618	+ <register name="TIMER0_COUNTER" type="NOLABEL" x="18" y="5"/>
	619	+ <register name="TIMER0_PERIOD" type="NOLABEL" x="29" y="5"/>
	620	+ <register name="TIMER0_WIDTH" type="NOLABEL" x="40" y="5"/>
	621	+
	622	+ <register name="TIMER 1" type="NODATA" x="0" y="6"/>
	623	+ <register name="TIMER1_CONFIG" type="NOLABEL" x="10" y="6"/>
	624	+ <register name="TIMER1_COUNTER" type="NOLABEL" x="18" y="6"/>
	625	+ <register name="TIMER1_PERIOD" type="NOLABEL" x="29" y="6"/>
	626	+ <register name="TIMER1_WIDTH" type="NOLABEL" x="40" y="6"/>
	627	+
	628	+ <register name="TIMER 2" type="NODATA" x="0" y="7"/>
	629	+ <register name="TIMER2_CONFIG" type="NOLABEL" x="10" y="7"/>
	630	+ <register name="TIMER2_COUNTER" type="NOLABEL" x="18" y="7"/>
	631	+ <register name="TIMER2_PERIOD" type="NOLABEL" x="29" y="7"/>
	632	+ <register name="TIMER2_WIDTH" type="NOLABEL" x="40" y="7"/>
	633	+</window>
	634	+<window name="System Interrupt Controller Register File" menu="&Register:&Peripherals:System Interrupt Controller" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD034" help-tag="HID_PERIPHERAL_ECIC532.htm">
	635	+ <register name="SIC_IAR0" type="NORMAL" x="11" y="0"/>
	636	+ <register name="SIC_IAR1" type="NORMAL" x="11" y="1"/>
	637	+ <register name="SIC_IAR2" type="NORMAL" x="11" y="2"/>
	638	+ <register name="SIC_IMASK" type="NORMAL" x="11" y="3"/>
	639	+ <register name="SIC_ISR" type="NORMAL" x="11" y="4"/>
	640	+ <register name="SIC_IWR" type="NORMAL" x="11" y="5"/>
	641	+</window>
	642	+<window name="MEMDMA1 Destination Registers" menu="&Register:&Peripherals:MEMDMAFlex:Destination Channel-1" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD029" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	643	+ <register name="High" type="NODATA" x="28" y="0"/>
	644	+ <register name="Low" type="NODATA" x="36" y="0"/>
	645	+ <register name="MDMA_D1_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	646	+ <register name="MDMAFLX1_NxtDscPNTRHigh_D" type="NOLABEL" x="28" y="1"/>
	647	+ <register name="MDMAFLX1_NxtDscPNTRLow_D" type="NOLABEL" x="36" y="1"/>
	648	+ <register name="MDMA_D1_START_ADDR" type="NODATA" x="0" y="2"/>
	649	+ <register name="MDMAFLX1_BaseAddrHigh_D" type="NOLABEL" x="28" y="2"/>
	650	+ <register name="MDMAFLX1_BaseAddrLow_D" type="NOLABEL" x="36" y="2"/>
	651	+ <register name="MDMA_D1_CONFIG" type="NODATA" x="0" y="4"/>
	652	+ <register name="MDMAFLX1_DMACNFG_D" type="NOLABEL" x="32" y="4"/>
	653	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	654	+ <register name="MDMAFLX1_DMACNFG_D_En" type="NOLABEL" x="32" y="5"/>
	655	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	656	+ <register name="MDMAFLX1_DMACNFG_D_Dir" type="NOLABEL" x="32" y="6"/>
	657	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	658	+ <register name="MDMAFLX1_DMACNFG_D_WSize" type="NOLABEL" x="32" y="7"/>
	659	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	660	+ <register name="MDMAFLX1_DMACNFG_D_2DMode" type="NOLABEL" x="32" y="8"/>
	661	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	662	+ <register name="MDMAFLX1_DMACNFG_D_Rstrt" type="NOLABEL" x="32" y="9"/>
	663	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	664	+ <register name="MDMAFLX1_DMACNFG_D_2DIntSel" type="NOLABEL" x="32" y="10"/>
	665	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	666	+ <register name="MDMAFLX1_DMACNFG_D_EnInt" type="NOLABEL" x="32" y="11"/>
	667	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	668	+ <register name="MDMAFLX1_DMACNFG_D_NDSize" type="NOLABEL" x="32" y="12"/>
	669	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	670	+ <register name="MDMAFLX1_DMACNFG_D_Flow" type="NOLABEL" x="32" y="13"/>
	671	+ <register name="MDMA_D1_X_COUNT" type="NODATA" x="0" y="15"/>
	672	+ <register name="MDMAFLX1_XCOUNT_D" type="NOLABEL" x="32" y="15"/>
	673	+ <register name="MDMA_D1_X_MODIFY" type="NODATA" x="0" y="16"/>
	674	+ <register name="MDMAFLX1_XMODIFY_D" type="NOLABEL" x="32" y="16"/>
	675	+ <register name="MDMA_D1_Y_COUNT" type="NODATA" x="0" y="17"/>
	676	+ <register name="MDMAFLX1_YCOUNT_D" type="NOLABEL" x="32" y="17"/>
	677	+ <register name="MDMA_D1_Y_MODIFY" type="NODATA" x="0" y="18"/>
	678	+ <register name="MDMAFLX1_YMODIFY_D" type="NOLABEL" x="32" y="18"/>
	679	+ <register name="High" type="NODATA" x="28" y="20"/>
	680	+ <register name="Low" type="NODATA" x="36" y="20"/>
	681	+ <register name="MDMA_D1_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	682	+ <register name="MDMAFLX1_CURDESCHIGH_D" type="NOLABEL" x="28" y="21"/>
	683	+ <register name="MDMAFLX1_CURDESCLOW_D" type="NOLABEL" x="36" y="21"/>
	684	+ <register name="MDMA_D1_CURR_ADDR" type="NODATA" x="0" y="22"/>
	685	+ <register name="MDMAFLX1_CURADDRHIGH_D" type="NOLABEL" x="28" y="22"/>
	686	+ <register name="MDMAFLX1_CURADDRLOW_D" type="NOLABEL" x="36" y="22"/>
	687	+ <register name="MDMA_D1_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	688	+ <register name="MDMAFLX1_IRQSTAT_D" type="NOLABEL" x="32" y="24"/>
	689	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	690	+ <register name="MDMAFLX1_IRQSTAT_D_Done" type="NOLABEL" x="32" y="25"/>
	691	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	692	+ <register name="MDMAFLX1_IRQSTAT_D_ERR" type="NOLABEL" x="32" y="26"/>
	693	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	694	+ <register name="MDMAFLX1_IRQSTAT_D_DscFetch" type="NOLABEL" x="32" y="27"/>
	695	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	696	+ <register name="MDMAFLX1_IRQSTAT_D_Run" type="NOLABEL" x="32" y="28"/>
	697	+ <register name="MDMA_D1_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	698	+ <register name="MDMAFLX1_PMAP_D" type="NOLABEL" x="32" y="30"/>
	699	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	700	+ <register name="MDMAFLX1_PMAP_D_CTYPE" type="NOLABEL" x="32" y="31"/>
	701	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	702	+ <register name="MDMAFLX1_PMAP_D_PMAP" type="NOLABEL" x="32" y="32"/>
	703	+ <register name="MDMA_D1_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	704	+ <register name="MDMAFLX1_CURXCOUNT_D" type="NOLABEL" x="32" y="34"/>
	705	+ <register name="MDMA_D1_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	706	+ <register name="MDMAFLX1_CURYCOUNT_D" type="NOLABEL" x="32" y="35"/>
	707	+</window>
	708	+<window name="MEMDMA1 Source Registers" menu="&Register:&Peripherals:MEMDMAFlex:Source Channel-1" description="" format="Hexadecimal" format-selection="ALL" type="SIM EMU" help-id="0xD02A" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	709	+ <register name="High" type="NODATA" x="28" y="0"/>
	710	+ <register name="Low" type="NODATA" x="36" y="0"/>
	711	+ <register name="MDMA_S1_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	712	+ <register name="MDMAFLX1_NxtDscPNTRHigh_S" type="NOLABEL" x="28" y="1"/>
	713	+ <register name="MDMAFLX1_NxtDscPNTRLow_S" type="NOLABEL" x="36" y="1"/>
	714	+ <register name="MDMA_S1_START_ADDR" type="NODATA" x="0" y="2"/>
	715	+ <register name="MDMAFLX1_BaseAddrHigh_S" type="NOLABEL" x="28" y="2"/>
	716	+ <register name="MDMAFLX1_BaseAddrLow_S" type="NOLABEL" x="36" y="2"/>
	717	+ <register name="MDMA_S1_CONFIG" type="NODATA" x="0" y="4"/>
	718	+ <register name="MDMAFLX1_DMACNFG_S" type="NOLABEL" x="32" y="4"/>
	719	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	720	+ <register name="MDMAFLX1_DMACNFG_S_En" type="NOLABEL" x="32" y="5"/>
	721	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	722	+ <register name="MDMAFLX1_DMACNFG_S_Dir" type="NOLABEL" x="32" y="6"/>
	723	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	724	+ <register name="MDMAFLX1_DMACNFG_S_WSize" type="NOLABEL" x="32" y="7"/>
	725	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	726	+ <register name="MDMAFLX1_DMACNFG_S_2DMode" type="NOLABEL" x="32" y="8"/>
	727	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	728	+ <register name="MDMAFLX1_DMACNFG_S_Rstrt" type="NOLABEL" x="32" y="9"/>
	729	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	730	+ <register name="MDMAFLX1_DMACNFG_S_2DIntSel" type="NOLABEL" x="32" y="10"/>
	731	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	732	+ <register name="MDMAFLX1_DMACNFG_S_EnInt" type="NOLABEL" x="32" y="11"/>
	733	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	734	+ <register name="MDMAFLX1_DMACNFG_S_NDSize" type="NOLABEL" x="32" y="12"/>
	735	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	736	+ <register name="MDMAFLX1_DMACNFG_S_Flow" type="NOLABEL" x="32" y="13"/>
	737	+ <register name="MDMA_S1_X_COUNT" type="NODATA" x="0" y="15"/>
	738	+ <register name="MDMAFLX1_XCOUNT_S" type="NOLABEL" x="32" y="15"/>
	739	+ <register name="MDMA_S1_X_MODIFY" type="NODATA" x="0" y="16"/>
	740	+ <register name="MDMAFLX1_XMODIFY_S" type="NOLABEL" x="32" y="16"/>
	741	+ <register name="MDMA_S1_Y_COUNT" type="NODATA" x="0" y="17"/>
	742	+ <register name="MDMAFLX1_YCOUNT_S" type="NOLABEL" x="32" y="17"/>
	743	+ <register name="MDMA_S1_Y_MODIFY" type="NODATA" x="0" y="18"/>
	744	+ <register name="MDMAFLX1_YMODIFY_S" type="NOLABEL" x="32" y="18"/>
	745	+ <register name="High" type="NODATA" x="28" y="20"/>
	746	+ <register name="Low" type="NODATA" x="36" y="20"/>
	747	+ <register name="MDMA_S1_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	748	+ <register name="MDMAFLX1_CURDESCHIGH_S" type="NOLABEL" x="28" y="21"/>
	749	+ <register name="MDMAFLX1_CURDESCLOW_S" type="NOLABEL" x="36" y="21"/>
	750	+ <register name="MDMA_S1_CURR_ADDR" type="NODATA" x="0" y="22"/>
	751	+ <register name="MDMAFLX1_CURADDRHIGH_S" type="NOLABEL" x="28" y="22"/>
	752	+ <register name="MDMAFLX1_CURADDRLOW_S" type="NOLABEL" x="36" y="22"/>
	753	+ <register name="MDMA_S1_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	754	+ <register name="MDMAFLX1_IRQSTAT_S" type="NOLABEL" x="32" y="24"/>
	755	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	756	+ <register name="MDMAFLX1_IRQSTAT_S_Done" type="NOLABEL" x="32" y="25"/>
	757	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	758	+ <register name="MDMAFLX1_IRQSTAT_S_ERR" type="NOLABEL" x="32" y="26"/>
	759	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	760	+ <register name="MDMAFLX1_IRQSTAT_S_DscFetch" type="NOLABEL" x="32" y="27"/>
	761	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	762	+ <register name="MDMAFLX1_IRQSTAT_S_Run" type="NOLABEL" x="32" y="28"/>
	763	+ <register name="MDMA_S1_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	764	+ <register name="MDMAFLX1_PMAP_S" type="NOLABEL" x="32" y="30"/>
	765	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	766	+ <register name="MDMAFLX1_PMAP_S_CTYPE" type="NOLABEL" x="32" y="31"/>
	767	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	768	+ <register name="MDMAFLX1_PMAP_S_PMAP" type="NOLABEL" x="32" y="32"/>
	769	+ <register name="MDMA_S1_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	770	+ <register name="MDMAFLX1_CURXCOUNT_S" type="NOLABEL" x="32" y="34"/>
	771	+ <register name="MDMA_S1_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	772	+ <register name="MDMAFLX1_CURYCOUNT_S" type="NOLABEL" x="32" y="35"/>
	773	+</window>
	774	+<window name="MEMDMA0 Destination Registers" menu="&Register:&Peripherals:MEMDMAFlex:Destination Channel-0" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD027" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	775	+ <register name="High" type="NODATA" x="28" y="0"/>
	776	+ <register name="Low" type="NODATA" x="36" y="0"/>
	777	+ <register name="MDMA_D0_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	778	+ <register name="MDMAFLX0_NxtDscPNTRHigh_D" type="NOLABEL" x="28" y="1"/>
	779	+ <register name="MDMAFLX0_NxtDscPNTRLow_D" type="NOLABEL" x="36" y="1"/>
	780	+ <register name="MDMA_D0_START_ADDR" type="NODATA" x="0" y="2"/>
	781	+ <register name="MDMAFLX0_BaseAddrHigh_D" type="NOLABEL" x="28" y="2"/>
	782	+ <register name="MDMAFLX0_BaseAddrLow_D" type="NOLABEL" x="36" y="2"/>
	783	+ <register name="MDMA_D0_CONFIG" type="NODATA" x="0" y="4"/>
	784	+ <register name="MDMAFLX0_DMACNFG_D" type="NOLABEL" x="32" y="4"/>
	785	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	786	+ <register name="MDMAFLX0_DMACNFG_D_En" type="NOLABEL" x="32" y="5"/>
	787	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	788	+ <register name="MDMAFLX0_DMACNFG_D_Dir" type="NOLABEL" x="32" y="6"/>
	789	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	790	+ <register name="MDMAFLX0_DMACNFG_D_WSize" type="NOLABEL" x="32" y="7"/>
	791	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	792	+ <register name="MDMAFLX0_DMACNFG_D_2DMode" type="NOLABEL" x="32" y="8"/>
	793	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	794	+ <register name="MDMAFLX0_DMACNFG_D_Rstrt" type="NOLABEL" x="32" y="9"/>
	795	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	796	+ <register name="MDMAFLX0_DMACNFG_D_2DIntSel" type="NOLABEL" x="32" y="10"/>
	797	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	798	+ <register name="MDMAFLX0_DMACNFG_D_EnInt" type="NOLABEL" x="32" y="11"/>
	799	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	800	+ <register name="MDMAFLX0_DMACNFG_D_NDSize" type="NOLABEL" x="32" y="12"/>
	801	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	802	+ <register name="MDMAFLX0_DMACNFG_D_Flow" type="NOLABEL" x="32" y="13"/>
	803	+ <register name="MDMA_D0_X_COUNT" type="NODATA" x="0" y="15"/>
	804	+ <register name="MDMAFLX0_XCOUNT_D" type="NOLABEL" x="32" y="15"/>
	805	+ <register name="MDMA_D0_X_MODIFY" type="NODATA" x="0" y="16"/>
	806	+ <register name="MDMAFLX0_XMODIFY_D" type="NOLABEL" x="32" y="16"/>
	807	+ <register name="MDMA_D0_Y_COUNT" type="NODATA" x="0" y="17"/>
	808	+ <register name="MDMAFLX0_YCOUNT_D" type="NOLABEL" x="32" y="17"/>
	809	+ <register name="MDMA_D0_Y_MODIFY" type="NODATA" x="0" y="18"/>
	810	+ <register name="MDMAFLX0_YMODIFY_D" type="NOLABEL" x="32" y="18"/>
	811	+ <register name="High" type="NODATA" x="28" y="20"/>
	812	+ <register name="Low" type="NODATA" x="36" y="20"/>
	813	+ <register name="MDMA_D0_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	814	+ <register name="MDMAFLX0_CURDESCHIGH_D" type="NOLABEL" x="28" y="21"/>
	815	+ <register name="MDMAFLX0_CURDESCLOW_D" type="NOLABEL" x="36" y="21"/>
	816	+ <register name="MDMA_D0_CURR_ADDR" type="NODATA" x="0" y="22"/>
	817	+ <register name="MDMAFLX0_CURADDRHIGH_D" type="NOLABEL" x="28" y="22"/>
	818	+ <register name="MDMAFLX0_CURADDRLOW_D" type="NOLABEL" x="36" y="22"/>
	819	+ <register name="MDMA_D0_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	820	+ <register name="MDMAFLX0_IRQSTAT_D" type="NOLABEL" x="32" y="24"/>
	821	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	822	+ <register name="MDMAFLX0_IRQSTAT_D_Done" type="NOLABEL" x="32" y="25"/>
	823	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	824	+ <register name="MDMAFLX0_IRQSTAT_D_ERR" type="NOLABEL" x="32" y="26"/>
	825	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	826	+ <register name="MDMAFLX0_IRQSTAT_D_DscFetch" type="NOLABEL" x="32" y="27"/>
	827	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	828	+ <register name="MDMAFLX0_IRQSTAT_D_Run" type="NOLABEL" x="32" y="28"/>
	829	+ <register name="MDMA_D0_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	830	+ <register name="MDMAFLX0_PMAP_D" type="NOLABEL" x="32" y="30"/>
	831	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	832	+ <register name="MDMAFLX0_PMAP_D_CTYPE" type="NOLABEL" x="32" y="31"/>
	833	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	834	+ <register name="MDMAFLX0_PMAP_D_PMAP" type="NOLABEL" x="32" y="32"/>
	835	+ <register name="MDMA_D0_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	836	+ <register name="MDMAFLX0_CURXCOUNT_D" type="NOLABEL" x="32" y="34"/>
	837	+ <register name="MDMA_D0_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	838	+ <register name="MDMAFLX0_CURYCOUNT_D" type="NOLABEL" x="32" y="35"/>
	839	+</window>
	840	+<window name="MEMDMA0 Source Registers" menu="&Register:&Peripherals:MEMDMAFlex:Source Channel-0" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD028" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	841	+ <register name="High" type="NODATA" x="28" y="0"/>
	842	+ <register name="Low" type="NODATA" x="36" y="0"/>
	843	+ <register name="MDMA_S0_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	844	+ <register name="MDMAFLX0_NxtDscPNTRHigh_S" type="NOLABEL" x="28" y="1"/>
	845	+ <register name="MDMAFLX0_NxtDscPNTRLow_S" type="NOLABEL" x="36" y="1"/>
	846	+ <register name="MDMA_S0_START_ADDR" type="NODATA" x="0" y="2"/>
	847	+ <register name="MDMAFLX0_BaseAddrHigh_S" type="NOLABEL" x="28" y="2"/>
	848	+ <register name="MDMAFLX0_BaseAddrLow_S" type="NOLABEL" x="36" y="2"/>
	849	+ <register name="MDMA_S0_CONFIG" type="NODATA" x="0" y="4"/>
	850	+ <register name="MDMAFLX0_DMACNFG_S" type="NOLABEL" x="32" y="4"/>
	851	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	852	+ <register name="MDMAFLX0_DMACNFG_S_En" type="NOLABEL" x="32" y="5"/>
	853	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	854	+ <register name="MDMAFLX0_DMACNFG_S_Dir" type="NOLABEL" x="32" y="6"/>
	855	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	856	+ <register name="MDMAFLX0_DMACNFG_S_WSize" type="NOLABEL" x="32" y="7"/>
	857	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	858	+ <register name="MDMAFLX0_DMACNFG_S_2DMode" type="NOLABEL" x="32" y="8"/>
	859	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	860	+ <register name="MDMAFLX0_DMACNFG_S_Rstrt" type="NOLABEL" x="32" y="9"/>
	861	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	862	+ <register name="MDMAFLX0_DMACNFG_S_2DIntSel" type="NOLABEL" x="32" y="10"/>
	863	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	864	+ <register name="MDMAFLX0_DMACNFG_S_EnInt" type="NOLABEL" x="32" y="11"/>
	865	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	866	+ <register name="MDMAFLX0_DMACNFG_S_NDSize" type="NOLABEL" x="32" y="12"/>
	867	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	868	+ <register name="MDMAFLX0_DMACNFG_S_Flow" type="NOLABEL" x="32" y="13"/>
	869	+ <register name="MDMA_S0_X_COUNT" type="NODATA" x="0" y="15"/>
	870	+ <register name="MDMAFLX0_XCOUNT_S" type="NOLABEL" x="32" y="15"/>
	871	+ <register name="MDMA_S0_X_MODIFY" type="NODATA" x="0" y="16"/>
	872	+ <register name="MDMAFLX0_XMODIFY_S" type="NOLABEL" x="32" y="16"/>
	873	+ <register name="MDMA_S0_Y_COUNT" type="NODATA" x="0" y="17"/>
	874	+ <register name="MDMAFLX0_YCOUNT_S" type="NOLABEL" x="32" y="17"/>
	875	+ <register name="MDMA_S0_Y_MODIFY" type="NODATA" x="0" y="18"/>
	876	+ <register name="MDMAFLX0_YMODIFY_S" type="NOLABEL" x="32" y="18"/>
	877	+ <register name="High" type="NODATA" x="28" y="20"/>
	878	+ <register name="Low" type="NODATA" x="36" y="20"/>
	879	+ <register name="MDMA_S0_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	880	+ <register name="MDMAFLX0_CURDESCHIGH_S" type="NOLABEL" x="28" y="21"/>
	881	+ <register name="MDMAFLX0_CURDESCLOW_S" type="NOLABEL" x="36" y="21"/>
	882	+ <register name="MDMA_S0_CURR_ADDR" type="NODATA" x="0" y="22"/>
	883	+ <register name="MDMAFLX0_CURADDRHIGH_S" type="NOLABEL" x="28" y="22"/>
	884	+ <register name="MDMAFLX0_CURADDRLOW_S" type="NOLABEL" x="36" y="22"/>
	885	+ <register name="MDMA_S0_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	886	+ <register name="MDMAFLX0_IRQSTAT_S" type="NOLABEL" x="32" y="24"/>
	887	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	888	+ <register name="MDMAFLX0_IRQSTAT_S_Done" type="NOLABEL" x="32" y="25"/>
	889	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	890	+ <register name="MDMAFLX0_IRQSTAT_S_ERR" type="NOLABEL" x="32" y="26"/>
	891	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	892	+ <register name="MDMAFLX0_IRQSTAT_S_DscFetch" type="NOLABEL" x="32" y="27"/>
	893	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	894	+ <register name="MDMAFLX0_IRQSTAT_S_Run" type="NOLABEL" x="32" y="28"/>
	895	+ <register name="MDMA_S0_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	896	+ <register name="MDMAFLX0_PMAP_S" type="NOLABEL" x="32" y="30"/>
	897	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	898	+ <register name="MDMAFLX0_PMAP_S_CTYPE" type="NOLABEL" x="32" y="31"/>
	899	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	900	+ <register name="MDMAFLX0_PMAP_S_PMAP" type="NOLABEL" x="32" y="32"/>
	901	+ <register name="MDMA_S0_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	902	+ <register name="MDMAFLX0_CURXCOUNT_S" type="NOLABEL" x="32" y="34"/>
	903	+ <register name="MDMA_S0_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	904	+ <register name="MDMAFLX0_CURYCOUNT_S" type="NOLABEL" x="32" y="35"/>
	905	+</window>
	906	+<window name="DMA Traffic Control" menu="&Register:&Peripherals:DMA Traffic Control" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_REG_DMA_TC_PER_DMA_TC_CNT.html">
	907	+
	908	+ <register name="DMA_TC_PER" type="NORMAL" x="10" y="0"/>
	909	+ <register name="DCB_TRAFFIC_PERIOD" type="NODATA" x="2" y="1"/>
	910	+ <register name="DEB_TRAFFIC_PERIOD" type="NODATA" x="2" y="2"/>
	911	+ <register name="DAB_TRAFFIC_PERIOD" type="NODATA" x="2" y="3"/>
	912	+ <register name="MDMA_ROUND_ROBIN_PERIOD" type="NODATA" x="2" y="4"/>
	913	+ <register name="DCB_TRAFFIC_PERIOD" type="NOLABEL" x="26" y="1"/>
	914	+ <register name="DEB_TRAFFIC_PERIOD" type="NOLABEL" x="26" y="2"/>
	915	+ <register name="DAB_TRAFFIC_PERIOD" type="NOLABEL" x="26" y="3"/>
	916	+ <register name="MDMA_ROUND_ROBIN_PERIOD" type="NOLABEL" x="26" y="4"/>
	917	+
	918	+ <register name="DMA_TC_CNT" type="NORMAL" x="10" y="6"/>
	919	+ <register name="DCB_TRAFFIC_COUNT" type="NODATA" x="2" y="7"/>
	920	+ <register name="DEB_TRAFFIC_COUNT" type="NODATA" x="2" y="8"/>
	921	+ <register name="DAB_TRAFFIC_COUNT" type="NODATA" x="2" y="9"/>
	922	+ <register name="MDMA_ROUND_ROBIN_COUNT" type="NODATA" x="2" y="10"/>
	923	+ <register name="DCB_TRAFFIC_COUNT" type="NOLABEL" x="26" y="7"/>
	924	+ <register name="DEB_TRAFFIC_COUNT" type="NOLABEL" x="26" y="8"/>
	925	+ <register name="DAB_TRAFFIC_COUNT" type="NOLABEL" x="26" y="9"/>
	926	+ <register name="MDMA_ROUND_ROBIN_COUNT" type="NOLABEL" x="26" y="10"/>
	927	+</window>
	928	+<window name="DMAFlex Ch-7 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-7" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD032" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	929	+ <register name="High" type="NODATA" x="28" y="0"/>
	930	+ <register name="Low" type="NODATA" x="36" y="0"/>
	931	+ <register name="DMA7_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	932	+ <register name="DMAFLX7_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	933	+ <register name="DMAFLX7_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	934	+ <register name="DMA7_START_ADDR" type="NODATA" x="0" y="2"/>
	935	+ <register name="DMAFLX7_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	936	+ <register name="DMAFLX7_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	937	+ <register name="DMA7_CONFIG" type="NODATA" x="0" y="4"/>
	938	+ <register name="DMAFLX7_DMACNFG" type="NOLABEL" x="32" y="4"/>
	939	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	940	+ <register name="DMAFLX7_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	941	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	942	+ <register name="DMAFLX7_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	943	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	944	+ <register name="DMAFLX7_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	945	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	946	+ <register name="DMAFLX7_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	947	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	948	+ <register name="DMAFLX7_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	949	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	950	+ <register name="DMAFLX7_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	951	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	952	+ <register name="DMAFLX7_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	953	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	954	+ <register name="DMAFLX7_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	955	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	956	+ <register name="DMAFLX7_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	957	+ <register name="DMA7_X_COUNT" type="NODATA" x="0" y="15"/>
	958	+ <register name="DMAFLX7_XCOUNT" type="NOLABEL" x="32" y="15"/>
	959	+ <register name="DMA7_X_MODIFY" type="NODATA" x="0" y="16"/>
	960	+ <register name="DMAFLX7_XMODIFY" type="NOLABEL" x="32" y="16"/>
	961	+ <register name="DMA7_Y_COUNT" type="NODATA" x="0" y="17"/>
	962	+ <register name="DMAFLX7_YCOUNT" type="NOLABEL" x="32" y="17"/>
	963	+ <register name="DMA7_Y_MODIFY" type="NODATA" x="0" y="18"/>
	964	+ <register name="DMAFLX7_YMODIFY" type="NOLABEL" x="32" y="18"/>
	965	+ <register name="High" type="NODATA" x="28" y="20"/>
	966	+ <register name="Low" type="NODATA" x="36" y="20"/>
	967	+ <register name="DMA7_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	968	+ <register name="DMAFLX7_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	969	+ <register name="DMAFLX7_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	970	+ <register name="DMA7_CURR_ADDR" type="NODATA" x="0" y="22"/>
	971	+ <register name="DMAFLX7_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	972	+ <register name="DMAFLX7_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	973	+ <register name="DMA7_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	974	+ <register name="DMAFLX7_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	975	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	976	+ <register name="DMAFLX7_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	977	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	978	+ <register name="DMAFLX7_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	979	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	980	+ <register name="DMAFLX7_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	981	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	982	+ <register name="DMAFLX7_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	983	+ <register name="DMA7_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	984	+ <register name="DMAFLX7_PMAP" type="NOLABEL" x="32" y="30"/>
	985	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	986	+ <register name="DMAFLX7_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	987	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	988	+ <register name="DMAFLX7_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	989	+ <register name="DMA7_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	990	+ <register name="DMAFLX7_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	991	+ <register name="DMA7_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	992	+ <register name="DMAFLX7_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	993	+</window>
	994	+<window name="DMAFlex Ch-6 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-6" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD031" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	995	+ <register name="High" type="NODATA" x="28" y="0"/>
	996	+ <register name="Low" type="NODATA" x="36" y="0"/>
	997	+ <register name="DMA6_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	998	+ <register name="DMAFLX6_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	999	+ <register name="DMAFLX6_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1000	+ <register name="DMA6_START_ADDR" type="NODATA" x="0" y="2"/>
	1001	+ <register name="DMAFLX6_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1002	+ <register name="DMAFLX6_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1003	+ <register name="DMA6_CONFIG" type="NODATA" x="0" y="4"/>
	1004	+ <register name="DMAFLX6_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1005	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1006	+ <register name="DMAFLX6_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1007	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1008	+ <register name="DMAFLX6_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1009	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1010	+ <register name="DMAFLX6_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1011	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1012	+ <register name="DMAFLX6_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1013	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1014	+ <register name="DMAFLX6_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1015	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1016	+ <register name="DMAFLX6_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1017	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1018	+ <register name="DMAFLX6_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1019	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1020	+ <register name="DMAFLX6_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1021	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1022	+ <register name="DMAFLX6_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1023	+ <register name="DMA6_X_COUNT" type="NODATA" x="0" y="15"/>
	1024	+ <register name="DMAFLX6_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1025	+ <register name="DMA6_X_MODIFY" type="NODATA" x="0" y="16"/>
	1026	+ <register name="DMAFLX6_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1027	+ <register name="DMA6_Y_COUNT" type="NODATA" x="0" y="17"/>
	1028	+ <register name="DMAFLX6_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1029	+ <register name="DMA6_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1030	+ <register name="DMAFLX6_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1031	+ <register name="High" type="NODATA" x="28" y="20"/>
	1032	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1033	+ <register name="DMA6_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1034	+ <register name="DMAFLX6_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1035	+ <register name="DMAFLX6_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1036	+ <register name="DMA6_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1037	+ <register name="DMAFLX6_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1038	+ <register name="DMAFLX6_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1039	+ <register name="DMA6_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1040	+ <register name="DMAFLX6_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1041	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1042	+ <register name="DMAFLX6_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1043	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1044	+ <register name="DMAFLX6_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1045	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1046	+ <register name="DMAFLX6_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1047	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1048	+ <register name="DMAFLX6_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1049	+ <register name="DMA6_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1050	+ <register name="DMAFLX6_PMAP" type="NOLABEL" x="32" y="30"/>
	1051	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1052	+ <register name="DMAFLX6_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1053	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1054	+ <register name="DMAFLX6_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1055	+ <register name="DMA6_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1056	+ <register name="DMAFLX6_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1057	+ <register name="DMA6_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1058	+ <register name="DMAFLX6_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1059	+</window>
	1060	+<window name="DMAFlex Ch-5 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-5" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD030" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	1061	+ <register name="High" type="NODATA" x="28" y="0"/>
	1062	+ <register name="Low" type="NODATA" x="36" y="0"/>
	1063	+ <register name="DMA5_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	1064	+ <register name="DMAFLX5_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	1065	+ <register name="DMAFLX5_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1066	+ <register name="DMA5_START_ADDR" type="NODATA" x="0" y="2"/>
	1067	+ <register name="DMAFLX5_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1068	+ <register name="DMAFLX5_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1069	+ <register name="DMA5_CONFIG" type="NODATA" x="0" y="4"/>
	1070	+ <register name="DMAFLX5_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1071	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1072	+ <register name="DMAFLX5_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1073	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1074	+ <register name="DMAFLX5_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1075	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1076	+ <register name="DMAFLX5_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1077	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1078	+ <register name="DMAFLX5_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1079	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1080	+ <register name="DMAFLX5_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1081	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1082	+ <register name="DMAFLX5_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1083	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1084	+ <register name="DMAFLX5_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1085	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1086	+ <register name="DMAFLX5_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1087	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1088	+ <register name="DMAFLX5_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1089	+ <register name="DMA5_X_COUNT" type="NODATA" x="0" y="15"/>
	1090	+ <register name="DMAFLX5_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1091	+ <register name="DMA5_X_MODIFY" type="NODATA" x="0" y="16"/>
	1092	+ <register name="DMAFLX5_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1093	+ <register name="DMA5_Y_COUNT" type="NODATA" x="0" y="17"/>
	1094	+ <register name="DMAFLX5_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1095	+ <register name="DMA5_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1096	+ <register name="DMAFLX5_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1097	+ <register name="High" type="NODATA" x="28" y="20"/>
	1098	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1099	+ <register name="DMA5_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1100	+ <register name="DMAFLX5_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1101	+ <register name="DMAFLX5_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1102	+ <register name="DMA5_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1103	+ <register name="DMAFLX5_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1104	+ <register name="DMAFLX5_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1105	+ <register name="DMA5_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1106	+ <register name="DMAFLX5_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1107	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1108	+ <register name="DMAFLX5_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1109	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1110	+ <register name="DMAFLX5_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1111	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1112	+ <register name="DMAFLX5_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1113	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1114	+ <register name="DMAFLX5_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1115	+ <register name="DMA5_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1116	+ <register name="DMAFLX5_PMAP" type="NOLABEL" x="32" y="30"/>
	1117	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1118	+ <register name="DMAFLX5_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1119	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1120	+ <register name="DMAFLX5_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1121	+ <register name="DMA5_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1122	+ <register name="DMAFLX5_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1123	+ <register name="DMA5_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1124	+ <register name="DMAFLX5_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1125	+</window>
	1126	+<window name="DMAFlex Ch-4 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-4" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD02F" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	1127	+ <register name="High" type="NODATA" x="28" y="0"/>
	1128	+ <register name="Low" type="NODATA" x="36" y="0"/>
	1129	+ <register name="DMA4_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	1130	+ <register name="DMAFLX4_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	1131	+ <register name="DMAFLX4_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1132	+ <register name="DMA4_START_ADDR" type="NODATA" x="0" y="2"/>
	1133	+ <register name="DMAFLX4_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1134	+ <register name="DMAFLX4_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1135	+ <register name="DMA4_CONFIG" type="NODATA" x="0" y="4"/>
	1136	+ <register name="DMAFLX4_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1137	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1138	+ <register name="DMAFLX4_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1139	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1140	+ <register name="DMAFLX4_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1141	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1142	+ <register name="DMAFLX4_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1143	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1144	+ <register name="DMAFLX4_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1145	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1146	+ <register name="DMAFLX4_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1147	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1148	+ <register name="DMAFLX4_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1149	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1150	+ <register name="DMAFLX4_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1151	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1152	+ <register name="DMAFLX4_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1153	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1154	+ <register name="DMAFLX4_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1155	+ <register name="DMA4_X_COUNT" type="NODATA" x="0" y="15"/>
	1156	+ <register name="DMAFLX4_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1157	+ <register name="DMA4_X_MODIFY" type="NODATA" x="0" y="16"/>
	1158	+ <register name="DMAFLX4_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1159	+ <register name="DMA4_Y_COUNT" type="NODATA" x="0" y="17"/>
	1160	+ <register name="DMAFLX4_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1161	+ <register name="DMA4_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1162	+ <register name="DMAFLX4_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1163	+ <register name="High" type="NODATA" x="28" y="20"/>
	1164	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1165	+ <register name="DMA4_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1166	+ <register name="DMAFLX4_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1167	+ <register name="DMAFLX4_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1168	+ <register name="DMA4_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1169	+ <register name="DMAFLX4_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1170	+ <register name="DMAFLX4_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1171	+ <register name="DMA4_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1172	+ <register name="DMAFLX4_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1173	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1174	+ <register name="DMAFLX4_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1175	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1176	+ <register name="DMAFLX4_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1177	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1178	+ <register name="DMAFLX4_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1179	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1180	+ <register name="DMAFLX4_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1181	+ <register name="DMA4_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1182	+ <register name="DMAFLX4_PMAP" type="NOLABEL" x="32" y="30"/>
	1183	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1184	+ <register name="DMAFLX4_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1185	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1186	+ <register name="DMAFLX4_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1187	+ <register name="DMA4_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1188	+ <register name="DMAFLX4_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1189	+ <register name="DMA4_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1190	+ <register name="DMAFLX4_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1191	+</window>
	1192	+<window name="DMAFlex Ch-3 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-3" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD02E" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	1193	+ <register name="High" type="NODATA" x="28" y="0"/>
	1194	+ <register name="Low" type="NODATA" x="36" y="0"/>
	1195	+ <register name="DMA3_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	1196	+ <register name="DMAFLX3_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	1197	+ <register name="DMAFLX3_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1198	+ <register name="DMA3_START_ADDR" type="NODATA" x="0" y="2"/>
	1199	+ <register name="DMAFLX3_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1200	+ <register name="DMAFLX3_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1201	+ <register name="DMA3_CONFIG" type="NODATA" x="0" y="4"/>
	1202	+ <register name="DMAFLX3_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1203	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1204	+ <register name="DMAFLX3_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1205	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1206	+ <register name="DMAFLX3_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1207	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1208	+ <register name="DMAFLX3_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1209	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1210	+ <register name="DMAFLX3_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1211	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1212	+ <register name="DMAFLX3_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1213	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1214	+ <register name="DMAFLX3_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1215	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1216	+ <register name="DMAFLX3_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1217	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1218	+ <register name="DMAFLX3_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1219	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1220	+ <register name="DMAFLX3_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1221	+ <register name="DMA3_X_COUNT" type="NODATA" x="0" y="15"/>
	1222	+ <register name="DMAFLX3_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1223	+ <register name="DMA3_X_MODIFY" type="NODATA" x="0" y="16"/>
	1224	+ <register name="DMAFLX3_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1225	+ <register name="DMA3_Y_COUNT" type="NODATA" x="0" y="17"/>
	1226	+ <register name="DMAFLX3_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1227	+ <register name="DMA3_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1228	+ <register name="DMAFLX3_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1229	+ <register name="High" type="NODATA" x="28" y="20"/>
	1230	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1231	+ <register name="DMA3_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1232	+ <register name="DMAFLX3_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1233	+ <register name="DMAFLX3_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1234	+ <register name="DMA3_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1235	+ <register name="DMAFLX3_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1236	+ <register name="DMAFLX3_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1237	+ <register name="DMA3_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1238	+ <register name="DMAFLX3_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1239	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1240	+ <register name="DMAFLX3_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1241	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1242	+ <register name="DMAFLX3_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1243	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1244	+ <register name="DMAFLX3_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1245	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1246	+ <register name="DMAFLX3_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1247	+ <register name="DMA3_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1248	+ <register name="DMAFLX3_PMAP" type="NOLABEL" x="32" y="30"/>
	1249	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1250	+ <register name="DMAFLX3_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1251	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1252	+ <register name="DMAFLX3_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1253	+ <register name="DMA3_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1254	+ <register name="DMAFLX3_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1255	+ <register name="DMA3_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1256	+ <register name="DMAFLX3_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1257	+</window>
	1258	+<window name="DMAFlex Ch-2 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-2" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD02D" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	1259	+ <register name="High" type="NODATA" x="28" y="0"/>
	1260	+ <register name="Low" type="NODATA" x="36" y="0"/>
	1261	+ <register name="DMA2_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	1262	+ <register name="DMAFLX2_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	1263	+ <register name="DMAFLX2_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1264	+ <register name="DMA2_START_ADDR" type="NODATA" x="0" y="2"/>
	1265	+ <register name="DMAFLX2_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1266	+ <register name="DMAFLX2_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1267	+ <register name="DMA2_CONFIG" type="NODATA" x="0" y="4"/>
	1268	+ <register name="DMAFLX2_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1269	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1270	+ <register name="DMAFLX2_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1271	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1272	+ <register name="DMAFLX2_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1273	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1274	+ <register name="DMAFLX2_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1275	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1276	+ <register name="DMAFLX2_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1277	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1278	+ <register name="DMAFLX2_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1279	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1280	+ <register name="DMAFLX2_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1281	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1282	+ <register name="DMAFLX2_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1283	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1284	+ <register name="DMAFLX2_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1285	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1286	+ <register name="DMAFLX2_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1287	+ <register name="DMA2_X_COUNT" type="NODATA" x="0" y="15"/>
	1288	+ <register name="DMAFLX2_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1289	+ <register name="DMA2_X_MODIFY" type="NODATA" x="0" y="16"/>
	1290	+ <register name="DMAFLX2_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1291	+ <register name="DMA2_Y_COUNT" type="NODATA" x="0" y="17"/>
	1292	+ <register name="DMAFLX2_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1293	+ <register name="DMA2_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1294	+ <register name="DMAFLX2_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1295	+ <register name="High" type="NODATA" x="28" y="20"/>
	1296	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1297	+ <register name="DMA2_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1298	+ <register name="DMAFLX2_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1299	+ <register name="DMAFLX2_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1300	+ <register name="DMA2_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1301	+ <register name="DMAFLX2_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1302	+ <register name="DMAFLX2_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1303	+ <register name="DMA2_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1304	+ <register name="DMAFLX2_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1305	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1306	+ <register name="DMAFLX2_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1307	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1308	+ <register name="DMAFLX2_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1309	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1310	+ <register name="DMAFLX2_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1311	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1312	+ <register name="DMAFLX2_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1313	+ <register name="DMA2_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1314	+ <register name="DMAFLX2_PMAP" type="NOLABEL" x="32" y="30"/>
	1315	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1316	+ <register name="DMAFLX2_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1317	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1318	+ <register name="DMAFLX2_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1319	+ <register name="DMA2_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1320	+ <register name="DMAFLX2_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1321	+ <register name="DMA2_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1322	+ <register name="DMAFLX2_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1323	+</window>
	1324	+<window name="DMAFlex Ch-1 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-1" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD02C" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	1325	+ <register name="High" type="NODATA" x="28" y="0"/>
	1326	+ <register name="Low" type="NODATA" x="36" y="0"/>
	1327	+ <register name="DMA1_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	1328	+ <register name="DMAFLX1_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	1329	+ <register name="DMAFLX1_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1330	+ <register name="DMA1_START_ADDR" type="NODATA" x="0" y="2"/>
	1331	+ <register name="DMAFLX1_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1332	+ <register name="DMAFLX1_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1333	+ <register name="DMA1_CONFIG" type="NODATA" x="0" y="4"/>
	1334	+ <register name="DMAFLX1_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1335	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1336	+ <register name="DMAFLX1_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1337	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1338	+ <register name="DMAFLX1_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1339	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1340	+ <register name="DMAFLX1_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1341	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1342	+ <register name="DMAFLX1_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1343	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1344	+ <register name="DMAFLX1_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1345	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1346	+ <register name="DMAFLX1_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1347	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1348	+ <register name="DMAFLX1_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1349	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1350	+ <register name="DMAFLX1_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1351	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1352	+ <register name="DMAFLX1_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1353	+ <register name="DMA1_X_COUNT" type="NODATA" x="0" y="15"/>
	1354	+ <register name="DMAFLX1_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1355	+ <register name="DMA1_X_MODIFY" type="NODATA" x="0" y="16"/>
	1356	+ <register name="DMAFLX1_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1357	+ <register name="DMA1_Y_COUNT" type="NODATA" x="0" y="17"/>
	1358	+ <register name="DMAFLX1_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1359	+ <register name="DMA1_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1360	+ <register name="DMAFLX1_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1361	+ <register name="High" type="NODATA" x="28" y="20"/>
	1362	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1363	+ <register name="DMA1_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1364	+ <register name="DMAFLX1_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1365	+ <register name="DMAFLX1_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1366	+ <register name="DMA1_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1367	+ <register name="DMAFLX1_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1368	+ <register name="DMAFLX1_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1369	+ <register name="DMA1_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1370	+ <register name="DMAFLX1_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1371	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1372	+ <register name="DMAFLX1_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1373	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1374	+ <register name="DMAFLX1_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1375	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1376	+ <register name="DMAFLX1_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1377	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1378	+ <register name="DMAFLX1_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1379	+ <register name="DMA1_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1380	+ <register name="DMAFLX1_PMAP" type="NOLABEL" x="32" y="30"/>
	1381	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1382	+ <register name="DMAFLX1_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1383	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1384	+ <register name="DMAFLX1_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1385	+ <register name="DMA1_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1386	+ <register name="DMAFLX1_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1387	+ <register name="DMA1_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1388	+ <register name="DMAFLX1_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1389	+</window>
	1390	+<window name="DMAFlex Ch-0 Registers" menu="&Register:&Peripherals:DMAFlex:DMAFlex Channel-0" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD02B" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_DMA_CONTROL_REGISTER_LIST.html">
	1391	+ <register name="High" type="NODATA" x="28" y="0"/>
	1392	+ <register name="Low" type="NODATA" x="36" y="0"/>
	1393	+ <register name="DMA0_NEXT_DESC_PTR" type="NODATA" x="0" y="1"/>
	1394	+ <register name="DMAFLX0_NxtDscPNTRHigh" type="NOLABEL" x="28" y="1"/>
	1395	+ <register name="DMAFLX0_NxtDscPNTRLow" type="NOLABEL" x="36" y="1"/>
	1396	+ <register name="DMA0_START_ADDR" type="NODATA" x="0" y="2"/>
	1397	+ <register name="DMAFLX0_BaseAddrHigh" type="NOLABEL" x="28" y="2"/>
	1398	+ <register name="DMAFLX0_BaseAddrLow" type="NOLABEL" x="36" y="2"/>
	1399	+ <register name="DMA0_CONFIG" type="NODATA" x="0" y="4"/>
	1400	+ <register name="DMAFLX0_DMACNFG" type="NOLABEL" x="32" y="4"/>
	1401	+ <register name="DMA Channel Enable" type="NODATA" x="2" y="5"/>
	1402	+ <register name="DMAFLX0_DMACNFG_En" type="NOLABEL" x="32" y="5"/>
	1403	+ <register name="DMA Direction" type="NODATA" x="2" y="6"/>
	1404	+ <register name="DMAFLX0_DMACNFG_Dir" type="NOLABEL" x="32" y="6"/>
	1405	+ <register name="Transfer Word Size" type="NODATA" x="2" y="7"/>
	1406	+ <register name="DMAFLX0_DMACNFG_WSize" type="NOLABEL" x="32" y="7"/>
	1407	+ <register name="DMA 2D Mode" type="NODATA" x="2" y="8"/>
	1408	+ <register name="DMAFLX0_DMACNFG_2DMode" type="NOLABEL" x="32" y="8"/>
	1409	+ <register name="DMA Buffer Clear (Restart)" type="NODATA" x="2" y="9"/>
	1410	+ <register name="DMAFLX0_DMACNFG_Rstrt" type="NOLABEL" x="32" y="9"/>
	1411	+ <register name="Data Interrupt Timing Select" type="NODATA" x="2" y="10"/>
	1412	+ <register name="DMAFLX0_DMACNFG_2DIntSel" type="NOLABEL" x="32" y="10"/>
	1413	+ <register name="Data Interrupt Enable" type="NODATA" x="2" y="11"/>
	1414	+ <register name="DMAFLX0_DMACNFG_EnInt" type="NOLABEL" x="32" y="11"/>
	1415	+ <register name="Flex Descriptor Size" type="NODATA" x="2" y="12"/>
	1416	+ <register name="DMAFLX0_DMACNFG_NDSize" type="NOLABEL" x="32" y="12"/>
	1417	+ <register name="Next Operation (Flow)" type="NODATA" x="2" y="13"/>
	1418	+ <register name="DMAFLX0_DMACNFG_Flow" type="NOLABEL" x="32" y="13"/>
	1419	+ <register name="DMA0_X_COUNT" type="NODATA" x="0" y="15"/>
	1420	+ <register name="DMAFLX0_XCOUNT" type="NOLABEL" x="32" y="15"/>
	1421	+ <register name="DMA0_X_MODIFY" type="NODATA" x="0" y="16"/>
	1422	+ <register name="DMAFLX0_XMODIFY" type="NOLABEL" x="32" y="16"/>
	1423	+ <register name="DMA0_Y_COUNT" type="NODATA" x="0" y="17"/>
	1424	+ <register name="DMAFLX0_YCOUNT" type="NOLABEL" x="32" y="17"/>
	1425	+ <register name="DMA0_Y_MODIFY" type="NODATA" x="0" y="18"/>
	1426	+ <register name="DMAFLX0_YMODIFY" type="NOLABEL" x="32" y="18"/>
	1427	+ <register name="High" type="NODATA" x="28" y="20"/>
	1428	+ <register name="Low" type="NODATA" x="36" y="20"/>
	1429	+ <register name="DMA0_CURR_DESC_PTR" type="NODATA" x="0" y="21"/>
	1430	+ <register name="DMAFLX0_CURDESCHIGH" type="NOLABEL" x="28" y="21"/>
	1431	+ <register name="DMAFLX0_CURDESCLOW" type="NOLABEL" x="36" y="21"/>
	1432	+ <register name="DMA0_CURR_ADDR" type="NODATA" x="0" y="22"/>
	1433	+ <register name="DMAFLX0_CURADDRHIGH" type="NOLABEL" x="28" y="22"/>
	1434	+ <register name="DMAFLX0_CURADDRLOW" type="NOLABEL" x="36" y="22"/>
	1435	+ <register name="DMA0_IRQ_STATUS" type="NODATA" x="0" y="24"/>
	1436	+ <register name="DMAFLX0_IRQSTAT" type="NOLABEL" x="32" y="24"/>
	1437	+ <register name="DMA Completion Status" type="NODATA" x="2" y="25"/>
	1438	+ <register name="DMAFLX0_IRQSTAT_Done" type="NOLABEL" x="32" y="25"/>
	1439	+ <register name="DMA Error Status" type="NODATA" x="2" y="26"/>
	1440	+ <register name="DMAFLX0_IRQSTAT_ERR" type="NOLABEL" x="32" y="26"/>
	1441	+ <register name="DMA Descriptor Fetch" type="NODATA" x="2" y="27"/>
	1442	+ <register name="DMAFLX0_IRQSTAT_DscFetch" type="NOLABEL" x="32" y="27"/>
	1443	+ <register name="DMA Channel Running" type="NODATA" x="2" y="28"/>
	1444	+ <register name="DMAFLX0_IRQSTAT_Run" type="NOLABEL" x="32" y="28"/>
	1445	+ <register name="DMA0_PERIPHERAL_MAP" type="NODATA" x="0" y="30"/>
	1446	+ <register name="DMAFLX0_PMAP" type="NOLABEL" x="32" y="30"/>
	1447	+ <register name="Channel Type" type="NODATA" x="2" y="31"/>
	1448	+ <register name="DMAFLX0_PMAP_CTYPE" type="NOLABEL" x="32" y="31"/>
	1449	+ <register name="Peripheral Mapped to Channel" type="NODATA" x="2" y="32"/>
	1450	+ <register name="DMAFLX0_PMAP_PMAP" type="NOLABEL" x="32" y="32"/>
	1451	+ <register name="DMA0_CURR_X_COUNT" type="NODATA" x="0" y="34"/>
	1452	+ <register name="DMAFLX0_CURXCOUNT" type="NOLABEL" x="32" y="34"/>
	1453	+ <register name="DMA0_CURR_Y_COUNT" type="NODATA" x="0" y="35"/>
	1454	+ <register name="DMAFLX0_CURYCOUNT" type="NOLABEL" x="32" y="35"/>
	1455	+</window>
	1456	+
	1457	+<!-- **************** Begin Emulator Register Windows **************** -->
	1458	+
	1459	+<window name="Product Identification Registers" menu="&Register:&ADSP-BF533 Extended Regs: Product ID" description="" format="Hexadecimal" format-selection="All" help-id="0x001E" help-tag="DSP_ID_Register_Window.htm">
	1460	+ <register name="DSPID" type="NORMAL" x="15" y="0"/>
	1461	+ <register name="CHIPID" type="NORMAL" x="15" y="1"/>
	1462	+</window>
	1463	+
	1464	+<window name="Trace Unit Registers" menu="&Register:&ADSP-BF533 Extended Regs: Trace Unit" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD041" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_TRACE_UNIT_REGISTER_LIST.html">
	1465	+ <register name="TBUFCTL" type="NORMAL" x="15" y="0"/>
	1466	+ <register name="TBUFSTAT" type="NORMAL" x="15" y="1"/>
	1467	+</window>
	1468	+
	1469	+<window name="Watchpoint and Patch Registers" menu="&Register:&ADSP-BF533 Extended Regs: Watchpoint and Patch" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD045" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_WATCHPOINT_PATCH_REGISTER_LIST.html">
	1470	+ <register name="WPIACTL" type="NORMAL" x="15" y="0"/>
	1471	+ <register name="WPIA0" type="NORMAL" x="15" y="1"/>
	1472	+ <register name="WPIA1" type="NORMAL" x="15" y="2"/>
	1473	+ <register name="WPIA2" type="NORMAL" x="15" y="3"/>
	1474	+ <register name="WPIA3" type="NORMAL" x="15" y="4"/>
	1475	+ <register name="WPIA4" type="NORMAL" x="15" y="5"/>
	1476	+ <register name="WPIA5" type="NORMAL" x="15" y="6"/>
	1477	+ <register name="WPIACNT0" type="NORMAL" x="15" y="7"/>
	1478	+ <register name="WPIACNT1" type="NORMAL" x="15" y="8"/>
	1479	+ <register name="WPIACNT2" type="NORMAL" x="15" y="9"/>
	1480	+ <register name="WPIACNT3" type="NORMAL" x="15" y="10"/>
	1481	+ <register name="WPIACNT4" type="NORMAL" x="15" y="11"/>
	1482	+ <register name="WPIACNT5" type="NORMAL" x="15" y="12"/>
	1483	+ <register name="WPDACTL" type="NORMAL" x="15" y="13"/>
	1484	+ <register name="WPDA0" type="NORMAL" x="15" y="14"/>
	1485	+ <register name="WPDA1" type="NORMAL" x="15" y="15"/>
	1486	+ <register name="WPDACNT0" type="NORMAL" x="15" y="16"/>
	1487	+ <register name="WPDACNT1" type="NORMAL" x="15" y="17"/>
	1488	+ <register name="WPSTAT" type="NORMAL" x="15" y="18"/>
	1489	+</window>
	1490	+
	1491	+<window name="Performance Registers" menu="&Register:&ADSP-BF533 Extended Regs: Performance Monitor" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD040" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_PERFORMANCE_MONITOR_REGISTER_LIST.html">
	1492	+ <register name="PFCTL" type="NORMAL" x="15" y="0"/>
	1493	+ <register name="PFCNTR0" type="NORMAL" x="15" y="1"/>
	1494	+ <register name="PFCNTR1" type="NORMAL" x="15" y="2"/>
	1495	+</window>
	1496	+
	1497	+<window name="Watchdog Timer Registers" menu="&Register:&ADSP-BF533 Extended Regs: Watchdog Timer" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD026" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_WATCHDOG_TIMER_REGISTER_LIST.html">
	1498	+ <register name="WDOG_CTL" type="NORMAL" x="15" y="0"/>
	1499	+ <register name="WDOG_CNT" type="NORMAL" x="15" y="1"/>
	1500	+ <register name="WDOG_STAT" type="NORMAL" x="15" y="2"/>
	1501	+</window>
	1502	+
	1503	+<window name="Real-Time Clock Registers" menu="&Register:&ADSP-BF533 Extended Regs: Real-Time Clock" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD024" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_REALTIME_CLOCK_REGISTER_LIST.html">
	1504	+ <register name="RTC_STAT" type="NORMAL" x="15" y="0"/>
	1505	+ <register name="RTC_ICTL" type="NORMAL" x="15" y="1"/>
	1506	+ <register name="RTC_ISTAT" type="NORMAL" x="15" y="2"/>
	1507	+ <register name="RTC_SWCNT" type="NORMAL" x="15" y="3"/>
	1508	+ <register name="RTC_ALARM" type="NORMAL" x="15" y="4"/>
	1509	+ <register name="RTC_PREN" type="NORMAL" x="15" y="5"/>
	1510	+</window>
	1511	+
	1512	+<window name="SPI Controller Registers" menu="&Register:&ADSP-BF533 Extended Regs: SPI Controller" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD049" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_SPI_CONTROLLER_REGISTER_LIST.html">
	1513	+ <register name="SPI_CTL" type="NORMAL" x="15" y="0"/>
	1514	+ <register name="SPI_FLG" type="NORMAL" x="15" y="1"/>
	1515	+ <register name="SPI_STAT" type="NORMAL" x="15" y="2"/>
	1516	+ <register name="SPI_TDBR" type="NORMAL" x="15" y="3"/>
	1517	+ <register name="SPI_RDBR" type="NORMAL" x="15" y="4"/>
	1518	+ <register name="SPI_BAUD" type="NORMAL" x="15" y="5"/>
	1519	+ <register name="SPI_SHADOW" type="NORMAL" x="15" y="6"/>
	1520	+</window>
	1521	+
	1522	+<window name="Programmable Flag Registers" menu="&Register:&ADSP-BF533 Extended Regs: Programmable Flags" description="" format="Hexadecimal" format-selection="All" type="EMU" help-id="0xD04D" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_PROGRAMMABLE_FLAG_REGISTER_LIST.html">
	1523	+ <register name="FIO_FLAG_D" type="NORMAL" x="15" y="0"/>
	1524	+ <register name="FIO_FLAG_C" type="NORMAL" x="15" y="1"/>
	1525	+ <register name="FIO_FLAG_S" type="NORMAL" x="15" y="2"/>
	1526	+ <register name="FIO_FLAG_T" type="NORMAL" x="15" y="3"/>
	1527	+
	1528	+ <register name="FIO_MASKA_D" type="NORMAL" x="15" y="4"/>
	1529	+ <register name="FIO_MASKA_C" type="NORMAL" x="15" y="5"/>
	1530	+ <register name="FIO_MASKA_S" type="NORMAL" x="15" y="6"/>
	1531	+ <register name="FIO_MASKA_T" type="NORMAL" x="15" y="7"/>
	1532	+
	1533	+ <register name="FIO_MASKB_D" type="NORMAL" x="32" y="0"/>
	1534	+ <register name="FIO_MASKB_C" type="NORMAL" x="32" y="1"/>
	1535	+ <register name="FIO_MASKB_S" type="NORMAL" x="32" y="2"/>
	1536	+ <register name="FIO_MASKB_T" type="NORMAL" x="32" y="3"/>
	1537	+
	1538	+ <register name="FIO_DIR" type="NORMAL" x="32" y="4"/>
	1539	+ <register name="FIO_POLAR" type="NORMAL" x="32" y="5"/>
	1540	+ <register name="FIO_EDGE" type="NORMAL" x="32" y="6"/>
	1541	+ <register name="FIO_BOTH" type="NORMAL" x="32" y="7"/>
	1542	+ <register name="FIO_INEN" type="NORMAL" x="32" y="8"/>
	1543	+</window>
	1544	+
	1545	+<window name="External Bus Interface Unit Registers" menu="&Register:&ADSP-BF533 Extended Regs: External Bus Interface Unit" description="" format="Hexadecimal" format-selection="All" type="SIM EMU" help-id="0xD04E" help-tag="\BF533-HWR.chm::/FILE_H_IDH_BF53X_EXTERNALBUS_INTERFACEUNIT_REGISTER_LIST.html">
	1546	+ <register name="Asynchronous Memory Global Control Register" type="NODATA" x="1" y="0"/>
	1547	+ <register name="EBIU_AMGCTL" type="NODATA" x="1" y="1"/>
	1548	+ <register name="EBIU_AMGCTL" type="NOLABEL" x="15" y="1"/>
	1549	+ <register name="AMCKEN Enable CLKOUT" type="NODATA" x="3" y="2"/>
	1550	+ <register name="AMCKEN" type="NOLABEL" x="48" y="2"/>
	1551	+ <register name="AMBEN Enable Asynchronous Memory Banks" type="NODATA" x="3" y="3"/>
	1552	+ <register name="AMBEN" type="NOLABEL" x="48" y="3"/>
	1553	+ <register name="CDPRIO Core/DMA Priority" type="NODATA" x="3" y="4"/>
	1554	+ <register name="CDPRIO" type="NOLABEL" x="48" y="4"/>
	1555	+ <register name="Asynchronous Memory Bank Control 0 Register" type="NODATA" x="1" y="6"/>
	1556	+ <register name="EBIU_AMBCTL0" type="NODATA" x="1" y="7"/>
	1557	+ <register name="EBIU_AMBCTL0" type="NOLABEL" x="15" y="7"/>
	1558	+ <register name="B0RDYEN Bank 0 ARDY Enable" type="NODATA" x="3" y="8"/>
	1559	+ <register name="B0RDYEN" type="NOLABEL" x="48" y="8"/>
	1560	+ <register name="B0RDYPOL Bank 0 ARDY Polarity" type="NODATA" x="3" y="9"/>
	1561	+ <register name="B0RDYPOL" type="NOLABEL" x="48" y="9"/>
	1562	+ <register name="B0TT Bank 0 Memory Transition Time" type="NODATA" x="3" y="10"/>
	1563	+ <register name="B0TT" type="NOLABEL" x="48" y="10"/>
	1564	+ <register name="B0ST Bank 0 Setup Time" type="NODATA" x="3" y="11"/>
	1565	+ <register name="B0ST" type="NOLABEL" x="48" y="11"/>
	1566	+ <register name="B0HT Bank 0 Hold Time" type="NODATA" x="3" y="12"/>
	1567	+ <register name="B0HT" type="NOLABEL" x="48" y="12"/>
	1568	+ <register name="B0RAT Bank 0 Read Access Time" type="NODATA" x="3" y="13"/>
	1569	+ <register name="B0RAT" type="NOLABEL" x="48" y="13"/>
	1570	+ <register name="B0WAT Bank 0 Write Access Time" type="NODATA" x="3" y="14"/>
	1571	+ <register name="B0WAT" type="NOLABEL" x="48" y="14"/>
	1572	+ <register name="B1RDYEN Bank 1 ARDY Enable" type="NODATA" x="3" y="15"/>
	1573	+ <register name="B1RDYEN" type="NOLABEL" x="48" y="15"/>
	1574	+ <register name="B1RDYPOL Bank 1 ARDY Polarity" type="NODATA" x="3" y="16"/>
	1575	+ <register name="B1RDYPOL" type="NOLABEL" x="48" y="16"/>
	1576	+ <register name="B1TT Bank 1 Memory Transition Time" type="NODATA" x="3" y="17"/>
	1577	+ <register name="B1TT" type="NOLABEL" x="48" y="17"/>
	1578	+ <register name="B1ST Bank 1 Setup Time" type="NODATA" x="3" y="18"/>
	1579	+ <register name="B1ST" type="NOLABEL" x="48" y="18"/>
	1580	+ <register name="B1HT Bank 1 Hold Time" type="NODATA" x="3" y="19"/>
	1581	+ <register name="B1HT" type="NOLABEL" x="48" y="19"/>
	1582	+ <register name="B1RAT Bank 1 Read Access Time" type="NODATA" x="3" y="20"/>
	1583	+ <register name="B1RAT" type="NOLABEL" x="48" y="20"/>
	1584	+ <register name="B1WAT Bank 1 Write Access Time" type="NODATA" x="3" y="21"/>
	1585	+ <register name="B1WAT" type="NOLABEL" x="48" y="21"/>
	1586	+ <register name="Asynchronous Memory Bank Control 1 Register" type="NODATA" x="1" y="23"/>
	1587	+ <register name="EBIU_AMBCTL1" type="NODATA" x="1" y="24"/>
	1588	+ <register name="EBIU_AMBCTL1" type="NOLABEL" x="15" y="24"/>
	1589	+ <register name="B2RDYEN Bank 2 ARDY Enable" type="NODATA" x="3" y="25"/>
	1590	+ <register name="B2RDYEN" type="NOLABEL" x="48" y="25"/>
	1591	+ <register name="B2RDYPOL Bank 2 ARDY Polarity" type="NODATA" x="3" y="26"/>
	1592	+ <register name="B2RDYPOL" type="NOLABEL" x="48" y="26"/>
	1593	+ <register name="B2TT Bank 2 Memory Transition Time" type="NODATA" x="3" y="27"/>
	1594	+ <register name="B2TT" type="NOLABEL" x="48" y="27"/>
	1595	+ <register name="B2ST Bank 2 Setup Time" type="NODATA" x="3" y="28"/>
	1596	+ <register name="B2ST" type="NOLABEL" x="48" y="28"/>
	1597	+ <register name="B2HT Bank 2 Hold Time" type="NODATA" x="3" y="29"/>
	1598	+ <register name="B2HT" type="NOLABEL" x="48" y="29"/>
	1599	+ <register name="B2RAT Bank 2 Read Access Time" type="NODATA" x="3" y="30"/>
	1600	+ <register name="B2RAT" type="NOLABEL" x="48" y="30"/>
	1601	+ <register name="B2WAT Bank 2 Write Access Time" type="NODATA" x="3" y="31"/>
	1602	+ <register name="B2WAT" type="NOLABEL" x="48" y="31"/>
	1603	+ <register name="B3RDYEN Bank 3 ARDY Enable" type="NODATA" x="3" y="32"/>
	1604	+ <register name="B3RDYEN" type="NOLABEL" x="48" y="32"/>
	1605	+ <register name="B3RDYPOL Bank 3 ARDY Polarity" type="NODATA" x="3" y="33"/>
	1606	+ <register name="B3RDYPOL" type="NOLABEL" x="48" y="33"/>
	1607	+ <register name="B3TT Bank 3 Memory Transition Time" type="NODATA" x="3" y="34"/>
	1608	+ <register name="B3TT" type="NOLABEL" x="48" y="34"/>
	1609	+ <register name="B3ST Bank 3 Setup Time" type="NODATA" x="3" y="35"/>
	1610	+ <register name="B3ST" type="NOLABEL" x="48" y="35"/>
	1611	+ <register name="B3HT Bank 3 Hold Time" type="NODATA" x="3" y="36"/>
	1612	+ <register name="B3HT" type="NOLABEL" x="48" y="36"/>
	1613	+ <register name="B3RAT Bank 3 Read Access Time" type="NODATA" x="3" y="37"/>
	1614	+ <register name="B3RAT" type="NOLABEL" x="48" y="37"/>
	1615	+ <register name="B3WAT Bank 3 Write Access Time" type="NODATA" x="3" y="38"/>
	1616	+ <register name="B3WAT" type="NOLABEL" x="48" y="38"/>
	1617	+ <register name="SDRAM Memory Global Control Register" type="NODATA" x="1" y="40"/>
	1618	+ <register name="EBIU_SDGCTL" type="NODATA" x="1" y="41"/>
	1619	+ <register name="EBIU_SDGCTL" type="NOLABEL" x="15" y="41"/>
	1620	+ <register name="SCTLE SDRAM Clock Enable" type="NODATA" x="3" y="42"/>
	1621	+ <register name="SCTLE" type="NOLABEL" x="48" y="42"/>
	1622	+ <register name="CL CAS Latency" type="NODATA" x="3" y="43"/>
	1623	+ <register name="CL" type="NOLABEL" x="48" y="43"/>
	1624	+ <register name="PASR Partial Array Self-Refresh" type="NODATA" x="3" y="44"/>
	1625	+ <register name="PASR" type="NOLABEL" x="48" y="44"/>
	1626	+ <register name="TRAS Bank Activate Command Delay" type="NODATA" x="3" y="45"/>
	1627	+ <register name="TRAS" type="NOLABEL" x="48" y="45"/>
	1628	+ <register name="TRP Precharge Delay" type="NODATA" x="3" y="46"/>
	1629	+ <register name="TRP" type="NOLABEL" x="48" y="46"/>
	1630	+ <register name="TRCD Bank Activate Delay" type="NODATA" x="3" y="47"/>
	1631	+ <register name="TRCD" type="NOLABEL" x="48" y="47"/>
	1632	+ <register name="TWR Write Command Delay" type="NODATA" x="3" y="48"/>
	1633	+ <register name="TWR" type="NOLABEL" x="48" y="48"/>
	1634	+ <register name="PUPSD Powerup Start Delay" type="NODATA" x="3" y="49"/>
	1635	+ <register name="PUPSD" type="NOLABEL" x="48" y="49"/>
	1636	+ <register name="PSM Powerup Sequence" type="NODATA" x="3" y="50"/>
	1637	+ <register name="PSM" type="NOLABEL" x="48" y="50"/>
	1638	+ <register name="PSSE Powerup Sequence Start Enable" type="NODATA" x="3" y="51"/>
	1639	+ <register name="PSSE" type="NOLABEL" x="48" y="51"/>
	1640	+ <register name="SRSF Self-Refresh Enable" type="NODATA" x="3" y="52"/>
	1641	+ <register name="SRSF" type="NOLABEL" x="48" y="52"/>
	1642	+ <register name="EBUFE Timing for External Buffering" type="NODATA" x="3" y="53"/>
	1643	+ <register name="EBUFE" type="NOLABEL" x="48" y="53"/>
	1644	+ <register name="FBBRW Fast Back-to-Back Read-to-Write" type="NODATA" x="3" y="54"/>
	1645	+ <register name="FBBRW" type="NOLABEL" x="48" y="54"/>
	1646	+ <register name="EMREN Extended Mode Register Enable" type="NODATA" x="3" y="55"/>
	1647	+ <register name="EMREN" type="NOLABEL" x="48" y="55"/>
	1648	+ <register name="TCSR Temperature Compensated Self-Refresh" type="NODATA" x="3" y="56"/>
	1649	+ <register name="TCSR" type="NOLABEL" x="48" y="56"/>
	1650	+ <register name="CDDBG Control Disable During Bus Grant" type="NODATA" x="3" y="57"/>
	1651	+ <register name="CDDBG" type="NOLABEL" x="48" y="57"/>
	1652	+ <register name="SDRAM Memory Bank Control Register" type="NODATA" x="1" y="59"/>
	1653	+ <register name="EBIU_SDBCTL" type="NODATA" x="1" y="60"/>
	1654	+ <register name="EBIU_SDBCTL" type="NOLABEL" x="15" y="60"/>
	1655	+ <register name="EBE External Bank Enable" type="NODATA" x="3" y="61"/>
	1656	+ <register name="EBE" type="NOLABEL" x="48" y="61"/>
	1657	+ <register name="EBSZ External Bank Size" type="NODATA" x="3" y="62"/>
	1658	+ <register name="EBSZ" type="NOLABEL" x="48" y="62"/>
	1659	+ <register name="EBCAW External Bank Column Address Width" type="NODATA" x="3" y="63"/>
	1660	+ <register name="EBCAW" type="NOLABEL" x="48" y="63"/>
	1661	+ <register name="SDRAM Refresh Rate Control Register" type="NODATA" x="1" y="65"/>
	1662	+ <register name="EBIU_SDRRC" type="NODATA" x="1" y="66"/>
	1663	+ <register name="EBIU_SDRRC" type="NOLABEL" x="15" y="66"/>
	1664	+ <register name="SDRAM Control Status Register" type="NODATA" x="1" y="68"/>
	1665	+ <register name="EBIU_SDSTAT" type="NODATA" x="1" y="69"/>
	1666	+ <register name="EBIU_SDSTAT" type="NOLABEL" x="15" y="69"/>
	1667	+ <register name="SDCI SDRAM Controller Idle" type="NODATA" x="3" y="70"/>
	1668	+ <register name="SDCI" type="NOLABEL" x="48" y="70"/>
	1669	+ <register name="SDSRA SDRAM Self Refresh Active" type="NODATA" x="3" y="71"/>
	1670	+ <register name="SDSRA" type="NOLABEL" x="48" y="71"/>
	1671	+ <register name="SDPUA SDRAM Powerup Active" type="NODATA" x="3" y="72"/>
	1672	+ <register name="SDPUA" type="NOLABEL" x="48" y="72"/>
	1673	+ <register name="SDRS " type="NODATA" x="3" y="73"/>
	1674	+ <register name="SDRS" type="NOLABEL" x="48" y="73"/>
	1675	+ <register name="SDEASE SDRAM EAB Sticky Error Status" type="NODATA" x="3" y="74"/>
	1676	+ <register name="SDEASE" type="NOLABEL" x="48" y="74"/>
	1677	+ <register name="BGSTAT Bus Grant Status" type="NODATA" x="3" y="75"/>
	1678	+ <register name="BGSTAT" type="NOLABEL" x="48" y="75"/>
	1679	+</window>
	1680	+
	1681	+</register-window-definitions>
	1682	+
	1683	+<!-- ************************************************************************ -->
	1684	+<!-- ******* Memory Window Definitions -->
	1685	+<!-- ************************************************************************ -->
	1686	+
	1687	+<memory-window-definitions help-chm="\procfrio.chm::/html/">
	1688	+<window name="BLACKFIN Memory" menu="&Memory:&BLACKFIN Memory" address="0xFF804000" left="0" top="0" right="400" bottom="200" title="BLACKFIN Memory" track="" format="Hexadecimal" format-selection="All" help-id="0x15" help-tag="HID_FRIO_Memory.htm"/>
	1689	+</memory-window-definitions>
	1690	+
	1691	+<!-- ************************************************************************ -->
	1692	+<!-- ******* Memory Definitions -->
	1693	+<!-- ************************************************************************ -->
	1694	+
	1695	+<memory-definitions>
	1696	+ <memory-segment start="0x00000000" end="0x07FFFFFF" width="8" type="PM RAM EXTERNAL" name="BLACKFIN Memory" memory-id="0" description="External SDRAM Memory"/>
	1697	+ <memory-segment start="0x20000000" end="0x200FFFFF" width="8" type="PM RAM EXTERNAL" name="BLACKFIN Memory" memory-id="0" description="External Async Bank0 Memory"/>
	1698	+ <memory-segment start="0x20100000" end="0x201FFFFF" width="8" type="PM RAM EXTERNAL" name="BLACKFIN Memory" memory-id="0" description="External Async Bank1 Memory"/>
	1699	+ <memory-segment start="0x20200000" end="0x202FFFFF" width="8" type="PM RAM EXTERNAL" name="BLACKFIN Memory" memory-id="0" description="External Async Bank2 Memory"/>
	1700	+ <memory-segment start="0x20300000" end="0x203FFFFF" width="8" type="PM RAM EXTERNAL" name="BLACKFIN Memory" memory-id="0" description="External Async Bank0 Memory"/>
	1701	+ <memory-segment start="0xEF000000" end="0xEF0003FF" width="8" type="PM ROM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Boot ROM"/>
	1702	+ <memory-segment start="0xFF800000" end="0xFF807FFF" width="8" type="DM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Data Bank A SRAM/Cache"/>
	1703	+ <memory-segment start="0xFF900000" end="0xFF907FFF" width="8" type="DM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Data Bank B SRAM/Cache"/>
	1704	+ <memory-segment start="0xFFA00000" end="0xFFA07FFF" width="8" type="PM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Instruction RAM (L1)"/>
	1705	+ <memory-segment start="0xFFA08000" end="0xFFA0BFFF" width="8" type="PM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Instruction RAM (L1)"/>
	1706	+ <memory-segment start="0xFFA0C000" end="0xFFA0FFFF" width="8" type="PM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Instruction RAM (L1)"/>
	1707	+ <memory-segment start="0xFFA10000" end="0xFFA13FFF" width="8" type="PM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Instruction RAM/Cache (L1)"/>
	1708	+ <memory-segment start="0xFFB00000" end="0xFFB00FFF" width="8" type="PM RAM INTERNAL" name="BLACKFIN Memory" memory-id="0" description="Scratch pad SRAM"/>
	1709	+ <memory-segment start="0xFFC00000" end="0xFFFFFFFF" width="8" type="DM RAM INTERNAL MMR" name="BLACKFIN Memory" memory-id="0" description="MMR registers"/>
	1710	+</memory-definitions>
	1711	+
	1712	+ <!-- *********************************************** -->
	1713	+ <!-- Register resets used by emulator -->
	1714	+ <!-- *********************************************** -->
	1715	+<register-reset-definitions>
	1716	+
	1717	+<!-- <register name="EBIU_SDRRC" reset-value="0x01A0" core="Common" /> -->
	1718	+
	1719	+ <!-- For BF533 EZ-Kit Lite's rev 1.7 and above use 0x25 -->
	1720	+ <!-- <register name="EBIU_SDBCTL" reset-value="0x25" core="Common" /-->
	1721	+
	1722	+ <!-- For BF533 EZ-Kit Lite's rev 1.6 and below use 0x13 -->
	1723	+
	1724	+ <!-- register name="EBIU_SDGCTL" reset-value="0x0091998D" core="Common" / -->
	1725	+
	1726	+
	1727	+ <!-- KOBANZAME setting -->
	1728	+ <register name="EBIU_SDRRC" reset-value="0x268" core="Common" />
	1729	+ <register name="EBIU_SDBCTL" reset-value="0x13" core="Common" />
	1730	+ <register name="EBIU_SDGCTL" reset-value="0x0191998D" core="Common" />
	1731	+
	1732	+</register-reset-definitions>
	1733	+
	1734	+ <!-- **************************************************************** -->
	1735	+ <!-- **** Beginning at VisualDSP++ 5.0, a Custom Board Support File -->
	1736	+ <!-- **** feature was introduced. Do not edit this file directly. -->
	1737	+ <!-- **** See online help for creating a custom board XML file and -->
	1738	+ <!-- **** for setting the Custom Board File active for your debugging -->
	1739	+ <!-- **** session. Your custom board file will have only the -->
	1740	+ <!-- **** incremental changes needed, not a full definition. -->
	1741	+ <!-- **************************************************************** -->
	1742	+
	1743	+</visualdsp-proc-xml>

Show on old repository browser