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ChipVault is a chip development program for
organizing VHDL and Verilog designs. ChipVault
displays designs hierarchically and provides for
rapid design navigation and editor launching.
ChipVault provides hooks for performing bottom-up
tasks such as launching RTL compilers, synthesis,
block generation and instantiation, and includes
simple to use Revision Control and Issue Tracking
systems to help facilitate large group design
projects with multiple designers and hundreds of
design files. ChipVault is written in Perl and is
small, fast, and efficient.

System Requirements

System requirement is not defined
Information regarding Project Releases and Project Resources. Note that the information here is a quote from page, and the downloads themselves may not be hosted on OSDN.

2001-12-05 05:23 Back to release list

Verilog support for template RTL generation and instantiation, an RTL Viewer with process and component collapsing, bang history and macro assignments for tools, component block printing, and ChipVault PDF manual generation on install.
標籤: Major feature enhancements

Project Resources